Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) Internal SOIC 28 W

General Description

The MAX155/MAX156 are high-speed, 8-bit, multichan-

nel analog-to-digital converters (ADCs) with simultaneous

track/holds (T/Hs) to eliminate timing differences between

input channel samples. The MAX155 has 8 analog input

channels and the MAX156 has 4 analog input channels.

Each channel has its own T/H, and all T/Hs sample at the

same instant. The ADC converts a channel in 3.6µs and

stores the result in an internal 8x8 RAM. The MAX155/

MAX156 also feature a 2.5V internal reference and

power-down capability, providing a complete, sampling

data-acquisition system.

When operating from a single +5V supply, the MAX155/

MAX156 perform either unipolar or bipolar, single-ended

or differential conversions. For applications requiring

wider dynamic range or bipolar conversions around

ground, the V

supply pin may be connected to -5V.

Conversions are initiated with a pulse to the WR pin, and data

is accessed from the ADC’s RAM with a pulse to the RD pin.

A bidirectional interface updates the channel configuration

and provides output data. The ADC may also be wired for

output-only operation.The MAX155 comes in 28-pin PDIP

and wide SO packages, and the MAX156 comes in 24-pin

narrow PDIP and 28-pin wide SO packages.

Features

● 8 Simultaneously Sampling Track/Hold Inputs

● 3.6µs Conversion Time Per Channel

● Unipolar or Bipolar Input Range

● Single-Ended or Differential Inputs

● Mixed Input Configurations Possible

● 2.5V Internal Reference

● Single +5V or Dual ±5V Supply Operation

Applications

● Phase-Sensitive Data Acquisition

● Vibration and Waveform Analysis

● DSP Analog Input

● AC Power Meters

● Portable Data Loggers

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/MAX155.related.

AIN0

AIN1

T/H

8-BIT

A/D

3.6µs

2.5V

REF

8 x 8

RAM

CONTROL

LOGIC

THREE-

STATE

BUFFER

T/H

AIN2

T/H

AIN3

T/H

AIN4

T/H

AIN5

T/H

AIN6

T/H

AIN7

T/H

8 8

MODE

CLK

REFIN

REFOUT

8-BIT

DATA

BUS

MAX155

MAX155/MAX156 8-/4-Channel ADCs with Simultaneous

T/Hs and Reference

19-2949; Rev 2; 1/12

Functional Diagram

EVALUATION KIT AVAILABLE

Summary of content (20 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference General Description Features The MAX155/MAX156 are high-speed, 8-bit, multichannel analog-to-digital converters (ADCs) with simultaneous track/holds (T/Hs) to eliminate timing differences between input channel samples. The MAX155 has 8 analog input channels and the MAX156 has 4 analog input channels. Each channel has its own T/H, and all T/Hs sample at the same instant. The ADC converts a channel in 3.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Absolute Maximum Ratings VDD to AGND.............................................................. -0.3V, +6V VDD to DGND.............................................................. -0.3V, +6V AGND to DGND............................................-0.3V, (VDD + 0.3V) VSS to AGND.............................................................. +0.3V, -6V VSS to DGND.............................................................. +0.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Electrical Characteristics (continued) (VDD = +5V, VREFIN = +2.5V. External Reference, VAGND = VDGND = 0V, VSS = 0V or -5V, fCLK = 5MHz external, Unipolar range single-ended mode, TA = TMIN to TMAX, unless otherwise noted.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Electrical Characteristics (continued) (VDD = +5V, VREFIN = +2.5V. External Reference, VAGND = VDGND = 0V, VSS = 0V or -5V, fCLK = 5MHz external, Unipolar range single-ended mode, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.4 V LOGIC OUTPUTS BUSY, D0–D7 Output Low Voltage VOL IOUT = 1.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference TIMING CHARACTERISTICS (Note 3, Figures 1-7) (continued) (VDD = +5V, VREFIN = +2.5V. External Reference, VAGND = VDGND = 0V, VSS = 0V or -5V, TA = TMIN to TMAX, unless otherwise noted.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference tCRS tCWS tCWH tCRS tCRH tCRS tCRH CS tWR tWRD WR tRDL tRDH tRDL RD tWBD tBRD tCONV tBWD BUSY tDV ttR DATA IN D0–D7 tAS tDV ttR DATA OUT DATA OUT tACQ tAH Figure 3. Write and Read Timing Pin Configuration TOP VIEW + + + 1 AIN3 AIN4 28 1 AIN1 AIN2 24 N.C 1 2 AIN2 AIN5 27 2 AIN0 AIN3 23 AIN1 2 27 N.C. 3 AIN1 AIN6 26 3 MODE VDD 22 N.C.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Pin Description PIN MAX155 MAX156 NAME FUNCTION PDIP/SO PDIP SO 1 23 26 AIN3 Sampling Analog Input, Channel 3 2 24 28 AIN2 Sampling Analog Input, Channel 2 3 1 2 AIN1 Sampling Analog Input, Channel 1 4 2 4 AIN0 Sampling Analog Input, Channel 0 5 3 5 MODE 6 4 6 VSS Negative Supply. Power VSS with -5V for extended input range.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Detailed Description ADC Operation The MAX155/MAX156 contain a 3.6µs successive approximation ADC and 8/4 track-and-hold (T/H) inputs. When a conversion is started, all AIN inputs are simultaneously sampled. All channels sample whether or not they are selected for the conversion. Either a single-channel or multichannel conversion may be requested and channel configurations may be mixed, ADC results are then stored in an internal RAM.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Multiplexer and A/D Configuration select from 4 mux configurations as listed in Table 4 (see the Hard-Wired Mode section). A conversion is started with a WR pulse. All channels sample on WR’s falling edge. Mux configuration data is loaded on WR’s rising edge.
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MAX155/MAX156 Interface Timing Input/Output Mode, Multichannel Conversion Timing I/O mode is selected when the MODE input is open circuit. In I/O mode, the mux configuration register determines the conversion type. The register is updated on the rising edge of WR. Table 1 lists all conversion options. For example, at D6/DIFF, a logic 0 or 1 selects a single-ended or differential conversion. Data is loaded into addressed locations in the configuration register with a series of WR pulses.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference CS WR RD tCONV BUSY D0-D7 DATA IN CH0 NOTE: After power-up, and prior to the above timing sequence, all single-ended channels must be set up by writing the following data into the configuration register.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference CS WR RD tCONV BUSY D0-D7 DATA IN 0,1 UPDATE CONFIGURATION REGISTER AND BEGIN NEW CONVERSION A2 0 1 0 1 0 1 0 1 0 0 1 1 PD INH BIP DIFF ALL 0 0 0 0 1 1 1 1 S S S S 0 0 0 0 6,7 CONSECUTIVE RAM LOCATIONS ARE ACCESSED BY CONSECUTIVE RD PULSES CONVERSION END OF ALL 4 DIFFERENTIAL CHANNELS NOTE: After power-up, and prior to the above timing sequence, all differential channels must be set up by writing to the configuration regi
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference CS WR RD tCONV BUSY D0-D7 DATA IN DATA OUT UPDATE CONFIGURATION REGISTER AND BEGIN NEW CONVERSION END OF CONVERSION READ DATA INDICATED BY ADDRESS CHANNEL IS SAMPLED HERE NOTE: A single-ended channel is converted by writing the following data into the configuration register (see Figure 3) The BIP and DIFF bits are not implemented until the next WR A0 A1 A2 PD INH BIP DIFF ALL S S S 0 0 S 0 1 S = May be selected F
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference CS WR RD tCONV BUSY INH = 0 DATA IN D0-D7 INH = 1 DATA OUT DATA OUT INH = 0 DATA IN DATA OUT READ DATA AT ADDRESS END OF CONVERSION READ DATA INDICATED BY ADDRESS UPDATE CONFIGURATION REGISTER AND BEGIN NEW CONVERSION ALL CHANNELS ARE SAMPLED HERE UPDATE CONFIGURATION REGISTER WITH NEW ADDRESS UPDATE CONFIGURATION REGISTER BEGIN CONVERSION NOTE: A RAM location is read by writing the following data into the configuration regist
PAGE 15
MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference CS WR RD tCONV BUSY CH0 D0-D7 ALL 8 CHANNELS ARE SAMPLED HERE END OF CONVERSION OF 8 CHANNELS CH1 THE FIRST RAM LOCATION READ IS CH 0 CH6 CH7 CONSECUTIVE RAM LOCATIONS ARE ACCESSED BY CONSECUTIVE RD PULSES MODE = 0 Figure 7a.
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference AINx (+) AINx (+) AINx MAX155 MAX156 AINx (-) VDD +5V 47µF 0.1µF MAX155 MAX156 AINx (-) VDD +5V 47µF 0.1µF REFOUT MAX584 4.7µF REFIN 4.7µF AINx +2.5V REFIN 0.1µF AGND 0.1µF VSS AGND VSS 4.7µF Figure 8a. Internal Reference Figure 8b. External Reference, +2.
PAGE 17
MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Applications Information OUTPUT CODE 9-Bit A/D Conversion (FS - 3/2 LSB) 1111 1111 1111 1110 1111 1101 FS = VREF FS 256 1 LSB = 0000 0011 0000 0010 0000 0001 0000 0000 0 1 LSB 3 LSBs 2 LSBs AIN FS - 1 LSB FS In I/O mode, a 9th bit of resolution can be created by performing two unipolar differential conversions with opposite input polarities (i.e., first with AIN0[+] and AIN1[-], then with AINO[-] and AIN1[+]).
PAGE 18
MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference For this example, 6 write operations (with each address and data setting in Table 5 above) load the mux after power-up. When the conversion starts, BUSY goes low while all selected channels are sequentially converted. Conversion results are stored in RAM and are ready to read when BUSY returns high. 2) Sample all selected channels with a WR pulse (and INH = 0), and update or rewrite any one location of the configuration register.
PAGE 19
MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Ordering Information Package Information PART PINPACKAGE TEMP RANGE ERROR (LSBs) MAX155ACPI+ 0°C to +70°C MAX155BCPI+ 0°C to +70°C 28 PDIP ±1 MAX155ACWI+ 0°C to +70°C 28 Wide SO ±½ MAX155BCWI+ 0°C to +70°C 28 Wide SO MAX155BC/D 0°C to +70°C Dice* MAX155AEPI+ -40°C to +85°C 28 PDIP ±½ MAX155BEPI+ -40°C to +85°C 28 PDIP ±1 MAX155AEWI+ -40°C to +85°C 28 Wide SO ±½ MAX155BEWI+ -40°C to +85°C 28 Wide SO ±1
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MAX155/MAX156 8-/4-Channel ADCs with Simultaneous T/Hs and Reference Revision History REVISION NUMBER REVISION DATE PAGES CHANGED 0 11/91 Initial release 1 6/94 Revised Figure 9a 2 1/12 Removed military grade packages and updated stylistic changes DESCRIPTION — 16 1–5, 18–20 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.