Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsPMICsPMIC - power supply controllers/monitors 700 µA TQFN 28 (5x5)

General Description

The MAX16050 monitors up to 5 voltages and

sequences up to 4 voltages, while the MAX16051 moni-

tors up to 6 voltages and sequences up to 5 voltages.

These devices provide an adjustable delay as each sup-

ply is turned on and they monitor each power-supply

voltage. When all of the voltages reach their final values

and the reset delay timer expires, a power-on-reset

(POR) output deasserts allowing the microcontroller (µC)

to operate. If any voltage falls below its threshold, the

reset output asserts and all voltage supplies are turned

off. The MAX16050/MAX16051 can be daisy-chained to

control a higher number of voltages in a system.

During a power-down event, the MAX16050/MAX16051

can reverse sequence the outputs. In this situation, each

voltage is turned off sequentially until it reaches a 250mV

level, at which point, the next supply is turned off. The

MAX16050/MAX16051 also provide internal pulldown cir-

cuitry that turns on during power-down, to help dis-

charge large output capacitors.

The MAX16050/MAX16051 feature a charge-pump sup-

ply output that can be used as a pullup voltage for dri-

ving external n-channel MOSFETs and an overvoltage

output that indicates when any of the monitored voltages

exceeds its overvoltage threshold. The MAX16050 also

provides three sequence control inputs for changing the

sequence order, while the MAX16051 has a fixed

sequence order.

The MAX16050/MAX16051 are available in a 28-pin

(4mm x 4mm) thin QFN package and are fully specified

over the -40°C to +85°C extended operating tempera-

ture range.

Applications

Features

o Monitor Up to 6 Voltages/Sequence Up to 5

Voltages

o Pin-Selectable Sequencing Order (MAX16050 Only)

o Reverse-Sequencing Capability on Shutdown

o Overvoltage Monitoring with Independent Output

o ±1.5% Threshold Accuracy

o 2.7V to 13.2V Operating Voltage Range

o Charge Pump to Fully Enhance External

n-Channel FETs

o Capacitor-Adjustable Sequencing Delay

o Fixed or Capacitor-Adjustable Reset Timeout

o Internal 85mA Pulldowns for Discharging

Capacitive Loads Quickly

o Daisy-Chaining Capability to Communicate

Across Multiple Devices

o Small 4mm x 4mm, 28-Pin TQFN Package

MAX16050/MAX16051

Voltage Monitors/Sequencer Circuits with

Reverse-Sequencing Capability

________________________________________________________________

Maxim Integrated Products

Ordering Information

GND

SET4

OUT4

DISC4

RESET

SET1

OUT1

FAULT

DISC1

REM

*EP = EXPOSED PAD

SEQ1

4567

2021 19 17 16 15

SEQ2

SEQ3

OUT2

SET2

DISC3

OUT3

MAX16050

ABP

OV_OUT

*EP

CP_OUT

SET3

TIMEOUT

DISC2

DELAY

EN_HOLD

SHDN

THIN QFN

(4mm x 4mm)

TOP VIEW

Pin Configurations

19-1013; Rev 1; 7/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Pin Configurations continued at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MONITORED

VOLTAGES

SEQUENCED

MAX16050ETI+

-40°C to +85°C 28 TQFN-EP*

MAX16051ETI+

-40°C to +85°C 28 TQFN-EP*

Denotes lead-free/RoHS-compliant package.

EP = Exposed pad.

Typical Operating Circuit appears at end of data sheet.

Servers

Workstations

Networking Systems

Telecom Equipment

Storage Systems

Summary of content (21 pages)

PAGE 1
9-1013; Rev 1; 7/08 KIT ATION EVALU E L B AVAILA Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability Features The MAX16050 monitors up to 5 voltages and sequences up to 4 voltages, while the MAX16051 monitors up to 6 voltages and sequences up to 5 voltages. These devices provide an adjustable delay as each supply is turned on and they monitor each power-supply voltage.
PAGE 2
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC .........................................................................-0.3V to +30V REM, OUT_, DISC_.................................................-0.3V to +30V RESET, SHDN, SET_, FAULT, EN_HOLD, EN, DELAY, OV_OUT, ABP, TIMEOUT, SEQ_...........................-0.3V to +6V CP_OUT.........................................................-0.
PAGE 3
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability (VCC = 2.7V to 13.2V, VEN = VABP, TA = TJ = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL DELAY, TIMEOUT Output Source Current IDT DELAY, TIMEOUT Threshold Voltage CONDITIONS VDELAY = VTIMEOUT = 0V VTH_DT MIN TYP MAX UNITS 1.6 2.5 3.0 µA 1.218 1.250 1.281 V 0.
PAGE 4
Typical Operating Characteristics (VCC = 5V; VEN = VABP, TA = +25°C, unless otherwise noted.) TA = +25°C 600 550 TA = -40°C 500 500 4.2 5.7 7.2 8.7 10.2 11.7 1.002 1.001 1.000 0.999 0.998 0.997 0.996 -15 10 35 85 60 -40 -15 10 35 60 TEMPERATURE (°C) TEMPERATURE (°C) NORMALIZED SEQUENCE DELAY vs. TEMPERATURE SEQUENCE DELAY vs. CDELAY NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE 1.15 1.10 CDELAY = OPEN 1.00 0.95 250 1.
PAGE 5
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability OV_OUT LOW VOLTAGE vs. SINK CURRENT 0.5 0.4 0.3 0.2 0.6 0.5 0.4 0.3 0.2 0.1 4 8 12 16 20 0.6 0.5 0.4 0.3 0.2 0 0 0 0.7 0.1 0.1 0 MAX16050/51 toc11 0.7 0.8 RESET LOW VOLTAGE (V) 0.6 MAX16050/51 toc10 OV_OUT LOW VOLTAGE (V) 0.7 0.8 OUT_ LOW VOLTAGE (V) MAX16050/51 toc09 0.8 RESET LOW VOLTAGE vs. SINK CURRENT OUT_ LOW VOLTAGE vs.
PAGE 6
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability Pin Description PIN NAME FUNCTION MAX16050 MAX16051 1 1 VCC Device Power-Supply Input. Connect to 2.7V to 13.2V. Bypass VCC to GND with a 0.1µF capacitor. 2 2 GND Ground 3 3 ABP Internal Supply Bypass Input. Connect a 1µF capacitor from ABP to GND. ABP is an internally generated voltage and must not be used to supply more than 1mA to external circuitry. 4 4 EN Analog Enable Input.
PAGE 7
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability PIN NAME MAX16050 MAX16051 18 18 SET1 19 19 OV_OUT 20 20 FUNCTION Set Monitored Threshold 1 Input. Monitor a voltage by setting the threshold with an external resistive divider. The SET1 threshold is 0.5V. Open-Drain Overvoltage Output. When any of the SET_ voltages exceed their 0.55V overvoltage threshold, OV_OUT goes low.
PAGE 8
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability Functional Diagram VCC MAX16050 MAX16051 INTERNAL VCC/UVLO CHARGE PUMP ABP OUT1–OUT4 (OUT1–OUT5) CP_OUT DISC1–DISC4 (DISC1–DISC5) COMP 250mV SET1–SET4 (SET1–SET5) COMP 85mA RESET VREF CONTROL LOGIC OV_OUT FAULT EN COMP REM EN_HOLD SEQ1–SEQ3 (MAX16050 ONLY) ( ) ARE FOR MAX16051 ONLY.
PAGE 9
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability MAX16050/MAX16051 VTH_EN EN SHDN tDELAY VTH VTH_PL V1 tDELAY VTH V2 tDELAY VTH V3 tDELAY V4 VTH tRP RESET REM Figure 1.
PAGE 10
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability VTH_EN VTH_EN EN SHDN tDELAY VTH VTH_PL V1 tDELAY VTH V2 tDELAY VTH V3 tDELAY VTH V4 tRP RESET REM Figure 2.
PAGE 11
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability MAX16050/MAX16051 tFAULT-PW FAULT tDELAY V1 VTH_PL V2 V3 VTH_PL V4 RESET REM Figure 3.
PAGE 12
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability ... PART DOES NOT RESPOND TO EN FALLING ... UNTIL EN_HOLD GOES HIGH EN EN_HOLD CONNECTED TO REM OF THE SECOND IC V1 V2 V3 V4 Figure 4.
PAGE 13
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability combinations (Table 1). In the default mode (SEQ1 = SEQ2 = SEQ3 = High Impedance), the power-up sequence is OUT1→OUT2→OUT3→OUT4. The MAX16051 features an additional channel and the sequence order is fixed at OUT1→OUT2→OUT3 →OUT4→OUT5. For complex systems with a large number of power supplies, the MAX16050/MAX16051 can be used in a daisy-chain configuration. Reverse sequencing in the daisy-chained configuration is still possible.
PAGE 14
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability When all of these conditions are met, the device starts the power-sequencing process by turning on OUT1–OUT_ in the sequence order.
PAGE 15
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability Disabling Channels If any channel is not used, connect the associated SET_ input to ABP. Connect DISC_ of the disabled channel to GND or leave it unconnected. The channel exclusion feature adds more flexibility to the device in a variety of different applications. SHDN and EN Inputs The shutdown input (SHDN) initiates a reverse sequencing event. When SHDN is brought low, the device will sequentially power down in reverse order.
PAGE 16
MAX16050/MAX16051 Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability Enable Hold Input (EN_HOLD) When EN_HOLD is low, a high-to-low transition on SHDN or on EN is ignored. EN_HOLD must be high for SHDN or EN to disable the device. This feature is used when multiple MAX16050/MAX16051s are daisychained (see Figure 7). Connect EN_HOLD to ABP if not used.
PAGE 17
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability MOSFET Selection The external pass MOSFET connects in series with the sequenced power-supply source. Since the load current and the MOSFET drain-to-source impedance (RDSON) determine the voltage drop, the on-characteristics of the MOSFET affect the load supply accuracy. For highest supply accuracy and lowest voltage drop, select a MOSFET with an appropriate drain-to-source on-resistance with a gate-to-source bias of 4.5V to 6.
PAGE 18
VBUS VBUS EN PULL SHDN LOW TO INITIATE A REVERSE ORDER SHUTDOWN OF ALL 8 SUPPLIES Figure 7.
PAGE 19
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability VBUS V4 V1 DC-DC EN V2 DC-DC EN V3 VPU DISC4 SET4 OUT4 DISC3 SET3 OUT3 DISC2 SET2 OUT2 DISC1 SET1 OUT1 DC-DC EN CP_OUT VCC EN RESET MAX16050 OV_OUT GND DELAY TIMEOUT ABP SEQ3 SEQ2 SHDN SEQ1 ON OFF EN_HOLD FAULT REM ______________________________________________________________________________________ 19 MAX16050/MAX16051 Typical Operating Circuit
PAGE 20
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability MAX16050/MAX16051 Pin Configurations (continued) Chip Information OUT1 DISC1 REM 20 OV_OUT RESET 21 SET1 FAULT PROCESS: BiCMOS TOP VIEW 19 18 17 16 15 SHDN 22 14 EN_HOLD DELAY 23 13 DISC2 TIMEOUT 24 12 OUT2 DISC5 25 11 SET2 PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
PAGE 21
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability REVISION NUMBER REVISION DATE 0 11/07 Initial release 1 7/08 Revised Electrical Characteristics and Disabling Channels sections. DESCRIPTION PAGES CHANGED — 2, 3, 15 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.