Datasheet

MAX17119 Evaluation Kit
Evaluates: MAX17119
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Power-Supply Configurations
The EV kit requires two positive power supplies and one
negative power supply for proper evaluation of the kit.
GON1 and GON2 require a +12V to +38V power supply
that provides up to 1A of current. GOFF requires a -12V
to -2V power supply that provides up to 1A of current.
Jumper JU11 configures the input power source for
GON2. Install a shunt across pins 1-2 of jumper JU11
to select GON1 as the input power source for GON2.
Install a shunt across pins 2-3 of jumper JU11 to apply
an external power source across the GON2 and PGND
PCB pads. Buffers Y8 and Y9 output the voltage applied
at the GON2 PCB pad. See Table 2 for proper jumper
JU11 configuration.
Additional surface-mount 1206 PCB pads are provided
for adding additional bulk capacitance at C91, C92, and
C93 when interfacing long wires to the EV kit’s GON1,
GON2, and GOFF power-supply inputs.
Output Load Connection
The EV kit provides resistor/capacitor loads for each
output channel to mimic TFT-LCD panel load models for
easy evaluation of the EV kit. Install shunts across jump-
ers JU1–JU11 to connect the RC loads to the IC’s scan-
driver outputs. Place scope probes across the shunts
installed at jumpers JU1–JU10 for proper evaluation
of the MAX17119 buffers (Y1–Y10), when applying
input signals through the SIGNAL_IN PCB pad, P1
header, or J1 header. Test points TP1–TP10 can be
used to monitor the loaded buffer outputs when applying
static DC voltages at the A1–A9 inputs.
Inputs (A_) Logic-Level Selection
(JU12–JU20)
Jumpers JU12–JU21 configure the EV kit’s A1–A9 inputs
to accept either a DC voltage or square-wave input
signal. Install a shunt across pins 1-2 of the individual
channels to use a square-wave signal applied at the
SIGNAL_IN PCB pad and J1 or P1 headers. The square-
wave signal should have a +2V to +5.5V logic-high
level. Place scope probes across the shunts installed
at jumpers JU2–JU11 for proper evaluation of the
MAX17119 scan-driver outputs (Y1–Y9 and YDCHG).
Install a shunt across pins 2-3 of the individual channels
to configure the inputs to static logic-low or logic-high
DC levels. DIP switch SW1 sets the buffer inputs to a
logic-high level using the output of LDO regulator (U2)
and potentiometer R60. Set SW1 to the on position to
place a logic-high voltage at the inputs. Set SW1 to the
off position to place a logic-low voltage at the inputs
through pulldown resistors R47–R55.
Table 2. GON2 Power Source Selection
(JU11)
Table 3. Output Load Connection
(JU1–JU10)
SHUNT
POSITION
GON2 IC PIN
GON2 INPUT
RANGE (V)
1-2 Connected to GON1 —
2-3
Connected to external
power source at GON2
and PGND PCB pads
+12 to +38
SHUNT
POSITION
MAX17119 Y1–
Y9 AND YDCHG
OUTPUTS
EV KIT
FUNCTION
Installed
Connected to RC
loads
Outputs monitored
at shunts
Not installed
Disconnected from
RC load
No-load condition
for scan drivers