Datasheet

MAX17119 Evaluation Kit
Evaluates: MAX17119
_______________________________________________________________________________________ 5
Inputs (FLK_) Logic-Level Selection
(JU22, JU23, JU24)
Jumpers JU22, JU23, and JU24 configure the MAX17119
EV kit’s FLK1, FLK2, and FLK3 inputs to accept either a
DC voltage or square-wave input signal. Install a shunt
across pins 1-2 of the individual channels to use a
square-wave signal applied at the FLK1, FLK2, and FLK3
test points or at the J1 or P1 headers. The square-wave
signal should have a +2V to +5.5V logic-high level.
Install a shunt across pins 2-3 of the individual channels
to configure the inputs to static logic-low or logic-high
DC levels. DIP switch SW2 sets the buffer inputs to a
logic-high level using the output of the LDO regulator
(U2) and potentiometer R60. Set SW2 to the on position
to place a logic-high voltage at the inputs. Set SW2 to
the off position to place a logic-low voltage at the inputs
through pulldown resistors R56–R58.
LDO Regulator
The LDO regulator output voltage can be adjusted from
+2.2V to +5.3V using R60 and monitored by probing test
point LDO_OUT. Rotate potentiometer R60 clockwise to
decrease the LDO output voltage and vice versa.
Table 4. Logic-Input Configuration
(JU12–JU20)
Table 5. Logic-Input Configuration
(JU22, JU23, JU24)
SHUNT
POSITION
SW1
POSITION
A_ INPUT LOGIC LEVEL
1-2 —
Square-wave signal
applied through header P1
or J1 (A1–A6)
Square-wave signal
applied at SIGNAL_IN PCB
pad (A7, A8, A9)
2-3
Off Low
On High
SHUNT
POSITION
SW2
POSITION
FLK_ INPUT LOGIC
LEVEL
1-2 —
Square-wave signal
applied through header
P1 or J1
2-3
Off Low
On High