Datasheet

FB Pin Maximum Voltage
The current through each FB_ pin is controlled only during
the step-up converter’s on-time. During the converter off-
time, the current sources are turned off. The output volt-
age does not discharge and stays high. The MAX17127
disables the FB_ current source, which the string is
shorted. In this case, the step-up converter’s output volt-
age is always applied to the disabled FB_ pin. The FB_
pin can withstand 45V.
PCB Layout Guidelines
Careful PCB layout is important for proper operation. Use
the following guidelines for good PCB layout:
1) Minimize the area of high-current switching loop of
rectifier diode, internal MOSFET, and output capacitor
to avoid excessive switching noise.
2) Connect high-current input and output components
with short and wide connections. The high-current
input loop goes from the positive terminal of the input
capacitor to the inductor, to the internal MOSFET,
and then to the input capacitor’s negative terminal.
The high-current output loop is from the positive
terminal of the input capacitor to the inductor, to the
rectifier diode, and to the positive terminal of the output
capacitors, reconnecting between the output
capacitor and input capacitor ground terminals. Avoid
using vias in the high-current paths. If vias are
unavoidable, use multiple vias in parallel to reduce
resistance and inductance.
3) Create a ground island (PGND) consisting of the
input and output capacitor ground. Connect all these
together with short, wide traces or a small ground
plane. Maximizing the width of the power ground
traces improves efficiency and reduces output-
voltage ripple and noise spikes. Create an analog
ground island (AGND) consisting of the overvoltage-
detection divider (R1 and R2) ground connection; the
ISET, FSLCT, COMP resistor connections; and the
device’s exposed backside pad. Connect the AGND
and PGND islands by connecting the AGND pins
directly to the exposed backside pad. Make no other
connections between these separate ground planes.
4) Place the overvoltage-detection divider resistors as
close as possible to the OVP pin. The divider’s center
trace should be kept short. Placing the resistors far
away causes the sensing trace to become antennae
that can pick up switching noise. Avoid running the
sensing traces near SW.
5) Place the V
IN
pin and V
DDIO
pin bypass capacitors as
close to the device as possible. The ground connection
of the bypass capacitors should be connected directly
to AGND pins with a wide trace.
6) Minimize the size of the SW node while keeping it wide
and short. Keep the SW node away from the feedback
node and ground. If possible, avoid running the SW
node from one side of the PCB to the other. Use DC
traces as a shield if necessary.
Refer to the MAX17127 Evaluation Kit data sheet for an
example of proper board layout.
www.maximintegrated.com
Maxim Integrated │ 20
MAX17127 Six-String WLED Driver with
Integrated Step-Up Converter