Datasheet

Maxim Integrated │ 3
www.maximintegrated.com
Evaluates: MAX17505 in
5V Output-Voltage Application
MAX17505 5V Output Evaluation Kit
Regulator Enable/Undervoltage-Lockout
Level (EN/UVLO)
The device offers an adjustable input undervoltage-
lockout level. For normal operation, a shunt should be
installed across pins 1-2 on jumper JU1. To disable the
output, install a shunt across pins 2-3 on JU1 and the EN/
UVLO pin is pulled to GND. See Table 1 for JU1 settings.
Set the voltage at which the device turns on with the resis-
tive voltage-divider R1/R2 connected from VIN_ to SGND.
Connect the center node of the divider to EN/UVLO.
Choose R1 to be 3.32MΩ and then calculate R2 as follows:
INU
R1 1.215
R2
(V 1.215)
×
=
−
where V
INU
is the voltage at which the device is required
to turn on.
MODE Selection (MODE)
The device’s MODE pin can be used to select among
PWM, PFM, or DCM modes of operation. The logic state
of the MODE pin is latched when VCC and EN/UVLO volt-
ages exceed the respective UVLO rising thresholds and
all internal voltages are ready to allow LX switching. State
changes on the MODE pin are ignored during normal
operation. Refer to the MAX17505 IC data sheet for more
information on PWM, PFM, and DCM modes of operation.
Table 2 shows EV kit jumper settings that can be used to
configure the desired mode of operation.
External Clock Synchronization (SYNC)
The internal oscillator of the device can be synchronized
to an external clock signal on the SYNC pin. The external
synchronization clock frequency must be between 1.1f
SW
and 1.4f
SW
, where f
SW
is the frequency of operation
set by R5. The minimum external clock high pulse width
should be greater than 50ns and the minimum external
clock low pulse width should be greater than 160ns.
*Default position.
*Default position.
*Default position.
Table 1. Regulator Enable (EN/UVLO)
Description (JU1)
Table 2. MODE Description (JU2)
Table 3. SYNC Description (JU3)
SHUNT
POSITION
EN/UVLO PIN MAX17505_ OUTPUT
1-2* Connected to VIN Enabled
Not
installed
Connected to the
center node of
resistor-divider R1
and R2
Enabled, UVLO level
set through the R1 and
R2 resistors
2-3 Connected to SGND Disabled
SHUNT
POSITION
MODE PIN MAX17505_ MODE
Not installed* Unconnected
PFM mode of
operation
1-2
Connected to
SGND
PWM mode of
operation
2-3
Connected to
VCC
DCM mode of
operation
SHUNT
POSITION
SYNC PIN MAX17505_ SYNC
1-2
Connected to
test loop on PCB
Frequency can be
synchronized with an
external clock
2-3*
Connected to
SGND
SYNC feature unused