Datasheet

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General Description

The MAX1932 generates a low-noise, high-voltage output

to bias avalanche photodiodes (APDs) in optical

receivers. Very low output ripple and noise is achieved by

a constant-frequency, pulse-width modulated (PWM)

boost topology combined with a unique architecture that

maintains regulation with an optional RC or LC post filter

inside its feedback loop. A precision reference and error

amplifier maintain 0.5% output voltage accuracy.

The MAX1932 protects expensive APDs against adverse

operating conditions while providing optimal bias.

Traditional boost converters measure switch current for

protection, whereas the MAX1932 integrates accurate

high-side current limiting to protect APDs under

avalanche conditions. A current-limit flag allows easy cali-

bration of the APD operating point by indicating the pre-

cise point of avalanche breakdown. The MAX1932 control

scheme prevents output overshoot and undershoot to

provide safe APD operation without data loss.

The output voltage can be accurately set with either

external resistors, an internal 8-bit DAC, an external

DAC, or other voltage source. Output span and offset

are independently settable with external resistors. This

optimizes the utilization of DAC resolution for applica-

tions that may require limited output voltage range, such

as 4.5V to 15V, 4.5V to 45V, 20V to 60V, or 40V to 90V.

Applications

Optical Receivers and Modules

Fiber Optic Network Equipment

Telecom Equipment

Laser Range Finders

PIN Diode Bias Supply

Features

♦ Small Circuit Footprint

♦ Circuit Height < 2mm

♦ 2.7V to 5.5V Input

♦ 4.5V to 90V Output

♦ No Overshoot

♦ Accurate High-Side Current Limit

♦ Avalanche Indicator Flag

♦ 8-Bit SPI-Compatible DAC

♦ Compatible with External DAC

♦ 0.5% Accurate Output

♦ Low Ripple Output (< 1mV)

♦ Small 12-Pin, 4mm

✕ 4mm Thin QFN Package

MAX1932

Digitally Controlled, 0.5% Accurate,

Safest APD Bias Supply

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-2555; Rev 1; 12/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART TEMP RANGE PIN-PACKAGE

MAX1932ETC -40°C to +85°C 12 Thin QFN

MAX1932

INPUT

2.7V TO 5.5V

APD BIAS OUTPUT

4.5V TO 90V

DAC INPUTS

AVALANCHE

INDICATOR

FLAG

VIN

COMP

SCLK

GND

CS-

CS+

GATE

DACOUT

DIN

Typical Application Circuit

MAX1932

11 10

4 5 6

SCLK GND

COMP

CS+

CS-

DACOUT GATE

VIN

DIN

Pin Configuration

EVALUATION KIT

AVAILABLE

Summary of content (16 pages)

PAGE 1
9-2555; Rev 1; 12/02 KIT ATION EVALU E L B AVAILA Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply The MAX1932 generates a low-noise, high-voltage output to bias avalanche photodiodes (APDs) in optical receivers. Very low output ripple and noise is achieved by a constant-frequency, pulse-width modulated (PWM) boost topology combined with a unique architecture that maintains regulation with an optional RC or LC post filter inside its feedback loop.
PAGE 2
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply ABSOLUTE MAXIMUM RATINGS VIN to GND...............................................................-0.3V to +6V DIN, SCLK, CS, FB to GND ......................................-0.3V to +6V COMP, DACOUT, GATE, CL to GND ...........-0.3V to (VIN +0.3V) CS+, CS- to GND .................................................-0.3V to +110V Continuous Power Dissipation (TA = +70°C) 12-Pin Thin QFN (derate 16.9mW/°C above +70°C) .
PAGE 3
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply (VIN = 3.3V, CS = SCLK = DIN = 3.3V, CS+ = CS- = 45V, Circuit of Figure 2, TA = 0°C to +85°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.6 V DIGITAL INPUTS (DIN, SCLK, CS) Input Low Voltage Input High Voltage 1.
PAGE 4
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply ELECTRICAL CHARACTERISTICS (continued) (VIN = 3.3V, CS = SCLK = DIN = 3.3V, CS+ = CS- = 45V, Circuit of Figure 2, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER FB Voltage SYMBOL CONDITIONS VFB TYP MAX UNITS 1.23875 1.26125 V 50 200 µS 100 Ω -4 +4 mV DAC Code = 01 to FF hex, DAC guaranteed monotonic -1 +1 LSB DAC code = 0F to FF hex, source or sink 50µA -1 +1 mV 240 360 kHz 0.
PAGE 5
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply SWITCHING WAVEFORM WITH LC FILTER SWITCHING WAVEFORMS MAX1932 toc01 VLX MAX1932 toc03 VLX 50V/div 50V/div IL IL VOUT RIPPLE (AC-COUPLED) VOUT RIPPLE (AC-COUPLED) 0.002V/div 50V/div INPUT CURRENT 50mA/div 0.002V/div VOUT = 90V, L = 300μH, C = 1μF, FIGURE 7 1μs/div 1μs/div OUTPUT VOLTAGE vs. INPUT VOLTAGE VFB vs. TEMPERATURE OUTPUT VOLTAGE vs. LOAD CURRENT 1.2515 1.2510 VFB (V) 1.2505 90 1.2500 1.2495 89 1.2490 5.5 4.
PAGE 6
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply MAX1932 Pin Description PIN NAME 1 SCLK FUNCTION 2 DIN DAC Serial Data Input 3 CL Current-Limit Indicator Flag. CL = 0 indicates that the part is in current limit. Logic high level = VIN. 4 CS+ Current-Limit Plus Sense Input. Connect a resistor from CS+ to CS- in series with the output. The differential threshold is 2V. CS+ has typically 1MΩ resistance to ground. 5 CS- Current-Limit Minus Sense Input.
PAGE 7
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply ⎛ 1.25V ⎞ ⎛ 1.25V ⎞ VDACOUT = CODE × ⎜ ⎟ ⎟ +⎜ ⎝ 256 ⎠ ⎝ 256 ⎠ On power-up, DACOUT defaults to FF hex or 1.25V, which corresponds to the minimum VOUT output voltage. The voltage generated at DACOUT is coupled to FB through R6. DACOUT can sink only 50µA so: 1.25V R6 ≥ 50μA Select the minimum output voltage (VOUTFF), and the maximum output voltage (V OUT01 ) for the desired adjustment range.
PAGE 8
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply (<10pF) are recommended to minimize losses. A smallsignal silicon switching diode is suitable if efficiency is not critical. Output Filter Capacitor Selection The output capacitors of the MAX1932 must have high enough voltage rating to operate with the V OUT required. Output capacitor effective series resistance (ESR) determines the amplitude of the high-frequency ripple seen on the output voltage.
PAGE 9
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply RSNS R1 (Ω) COUT C3 (µF) RCOMP R7 (kΩ) CCOMP C4 (µF) 806 0.1 20 0.22 806 0.047 15 0.22 0.10 10 0.47 0.1 20 0.22 0.01 7.5 0.47 INDUCTOR L1 (µH) CSNS C2 (µF) 5VIN, 40-90VOUT at 2.5mA 100 0.047 5VIN, 20-60VOUT at 2.5mA 150 0.10 5VIN, 20-60VOUT at 5mA 82 0.22 392 3VIN, 40-90VOUT at 2.5mA 33 0.047 806 3VIN, 4.5-15VOUT at 2.5mA 220 0.
PAGE 10
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply COMP VIN UVLO REF 1.25V PWM CONTROL AND GATE DRIVER FB GATE ERROR AMPLIFIER RAMP ERROR COMPARATOR GND OSC 987kΩ CS+ CLIM CL 13kΩ BUFFER 987kΩ CS13kΩ REF SCLK DIN SPI SERIAL INTERFACE DACOUT 8 8-BIT DAC CS Figure 1.
PAGE 11
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply L1 100μH VIN CL COMP R7 20kΩ MAX1932 C1 1μF INPUT 2.7V TO 5.5V D1 100V R1 806Ω VOUT 40V TO 90V MAX1932 C4 0.22μF C2 0.047 GATE C3 0.1μF N1 BSS123 CS CS+ CS- SCLK R5 1MΩ DIN FB GND DACOUT R6 24.9kΩ R8 32.4kΩ Figure 2. Typical Operating Circuit INSTRUCTION EXECUTED VOUT CS GATE 1 FB 8 SCLK MAX1932 DIN D7 CS+ D6 D5 D4 D3 D2 D1 DO CS- Figure 3. Taking Feedback Ahead of Output Filter Figure 4.
PAGE 12
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply CS tCSW tCSH0 tCSS0 tCSH1 tCH SCLK tCL tDS tCSS1 tDH DIN Figure 5.
PAGE 13
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply MAX1932 120 100 80 90V, 1mA 90V, 2.5mA POLE1 0.0023Hz 0.0023Hz ZERO1 36Hz 36Hz POLE2 36Hz 91Hz POLE3 4.2kHz 4.2kHz AOL 102dB 98dB MAGNITUDE (dB) 60 40 36Hz 91Hz 20 0.01 0.1 1.0 FREQUENCY (Hz) 10 100 1k 10k 4.2k Figure 6.
PAGE 14
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply VIN 330μH VOUT 0.1μF 1μF GATE FB MAX1932 CS+ CS- Figure 7. Adding a Post LC Filter VIN TO CS+ TO CSR1 VOUT GATE R5 MAX1932 FB R8 R9 R10 NTC THERMISTOR Figure 8.
PAGE 15
Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 1 ______________________________________________________________________________________ 2 15 MAX1932 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
PAGE 16
MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.