Datasheet

MAX19707
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
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PIN NAME FUNCTION
10 QAP Channel-QA Positive Analog Input. For single-ended operation, connect signal source to QAP.
13–18, 21–24
D0–D9
Digital I/O. Outputs for receive ADC in Rx mode. Inputs for transmit DAC in Tx mode. D9 is the most
significant bit (MSB) and D0 is the least significant bit (LSB).
19 OGND Output-Driver Ground
20 OV
DD
Output-Driver Power Supply. Supply range from 1.8V to V
DD
. Bypass OV
DD
to OGND with a
combination of a 2.2µF capacitor in parallel with a 0.1µF capacitor.
25 SHDN Active-Low Shutdown Input. Apply logic-low to place the MAX19707 in shutdown.
26 DOUT Aux-ADC Digital Output
27 T/R
Transmit- or Receive-Mode Select Input. T/R logic-low input sets the device in receive mode. A
logic-high input sets the device in transmit mode.
28 DIN 3-Wire Serial-Interface Data Input. Data is latched on the rising edge of the SCLK.
29 SCLK 3-Wire Serial-Interface Clock Input
30 CS 3-Wire Serial-Interface Chip-Select Input. Logic-low enables the serial interface.
34 ADC2 Analog Input for Auxiliary ADC
35 ADC1 Analog Input for Auxiliary ADC
36 DAC3 Analog Output for Auxiliary DAC3
37 DAC2 Analog Output for Auxiliary DAC2
38 DAC1 Analog Output for Auxiliary DAC1 (AFC DAC, V
OUT
= 1.1V During Power-Up)
40, 41
IDN, IDP
DAC Channel-ID Differential Voltage Output
44, 45
QDN, QDP
DAC Channel-QD Differential Voltage Output
46 REFIN Reference Input. Connect to V
DD
for internal reference. Bypass to GND with a 0.1µF capacitor.
47 COM Common-Mode Voltage I/O. Bypass COM to GND with a 0.33µF capacitor.
48 REFN
Negative Reference I/O. Rx ADC conversion range is ±(V
REFP
- V
REFN
). Bypass REFN to GND with a
0.33µF capacitor.
— EP Exposed Paddle. Exposed paddle is internally connected to GND. Connect EP to the GND plane.
Pin Description (continued)
MICROWIRE is a trademark of National Semiconductor Corp.
Detailed Description
The MAX19707 integrates a dual, 10-bit Rx ADC and a
dual, 10-bit Tx DAC while providing ultra-low power
and high dynamic performance at a 45Msps conver-
sion rate. The Rx ADC analog input amplifiers are fully
differential and accept 1.024V
P-P
full-scale signals. The
Tx DAC analog outputs are fully differential with
±400mV full-scale output, selectable common-mode
DC level, and adjustable I/Q offset trim.
The MAX19707 integrates three 12-bit auxiliary DAC
(aux-DAC) channels and a 10-bit, 333ksps auxiliary
ADC (aux-ADC) with 4:1 input multiplexer. The aux-DAC
channels feature 1µs settling time for fast automatic
gain-control (AGC), variable-gain amplifier (VGA), and
automatic frequency-control (AFC) level setting. The
aux-ADC features data averaging to reduce processor
overhead and a selectable clock-divider to program the
conversion rate.
The MAX19707 includes a 3-wire serial interface to
control operating modes and power management. The
serial interface is SPI and MICROWIRE™ compatible.
The MAX19707 serial interface selects shutdown, idle,
standby, transmit (Tx), and receive (Rx) modes, as well
as controls aux-DAC and aux-ADC channels.
The Rx ADC and Tx DAC share a common digital I/O to
reduce the digital interface to a single, 10-bit parallel
multiplexed bus. The 10-bit digital bus operates on a
single 1.8V to 3.3V supply.