Datasheet

MAX19707

10-Bit, 45Msps, Ultra-Low-Power

Analog Front-End

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The Tx DAC also features independent DC offset cor-

rection of each I/Q channel. This feature is configured

through the SPI interface. The DC offset correction is

used to optimize sideband and carrier suppression in

the Tx signal path (see Table 9).

Figure 4. Tx DAC Common-Mode DC Level at IDN, IDP or QDN, QDP Differential Outputs

Tx DAC

I-CH

Tx DAC

Q-CH

FULL SCALE = 1.25V

COM

= 1.05V

ZERO SCALE = 0.85V

COMMON-MODE LEVEL

SELECT CM1 = 0, CM0 = 0

COM

= 1.05V

DIFF

= ±400mV

EXAMPLE:

Tx RFIC INPUT REQUIREMENTS

• DC COMMON-MODE BIAS =

0.9V (MIN), 1.3V (MAX)

• BASEBAND INPUT = ±400mV

DC-COUPLED

MAX19707