Datasheet

MAX19707
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈ 10pF on all digital outputs, f
CLK
= 45MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33µF, unless otherwise noted. C
L
< 5pF on all aux-DAC outputs. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Standby mode: CLK = 0 or OV
DD
;
aux-DACs ON and at midscale,
aux-ADC ON
3.2 5
Idle mode: f
CLK
= 45MHz; aux-DACs ON
and at midscale, aux-ADC ON
12.1
15
mA
V
DD
Supply Current
Shutdown mode: CLK = 0 or OV
DD
1µA
Ext1-Rx, Ext2-Rx, Ext3-Rx, Ext4-Rx,
SPI1-Rx, SPI3-Rx states; receive ADC
operating mode (Rx): f
CLK
= 45MHz,
f
IN
= 5.5MHz on both channels;
aux-DACs ON and at midscale,
aux-ADC ON
7.7 mA
OV
DD
Supply Current
Ext1-Tx, Ext2-Tx, Ext3-Tx, Ext4-Tx,
SPI2-Tx, SPI4-Tx states; transmit DAC
operating mode (Tx), f
CLK
= 45MHz, f
OUT
= 2.2MHz on both channels; aux-DACs
ON and at midscale, aux-ADC ON
485
µA
S tand b y m od e: C LK = 0 or OV
D D
; aux- D AC s
ON and at midscale, aux-ADC ON
1
Idle mode: f
CLK
= 45MHz; aux-DACs ON
and at midscale, aux-ADC ON
76
Shutdown mode: CLK = 0 or OV
DD
1
Rx ADC DC ACCURACY
Resolution N 10 Bits
Integral Nonlinearity INL
±1.6
LSB
Differential Nonlinearity DNL
±0.7
LSB
Offset Error Residual DC offset error -5
±0.5
+5
%FS
Gain Error Include reference error
-5.5 ±1.0 +5.5
%FS
DC Gain Matching
-0.15 ±0.01 +0.15
dB
Offset Matching
±13
LSB
Gain Temperature Coefficient
±30
ppm/°C
Offset error (V
DD
±5%)
±0.4
LSB
Power-Supply Rejection PSRR
Gain error (V
DD
±5%)
±0.1
%FS