Datasheet

MAX2014
50MHz to 1000MHz, 75dB Logarithmic
Detector/Controller
10
variable-gain PA. As shown in the figure, the MAX2014
monitors the output of the PA through a directional cou-
pler. An internal integrator (Figure 2) compares the
detected signal with a reference voltage determined by
V
SET
. The integrator, acting like a comparator, increas-
es or decreases the voltage at OUT, according to how
closely the detected signal level matches the V
SET
ref-
erence. The MAX2014 adjusts the power of the PA to a
level determined by the voltage applied to SET. With R1 =
0Ω, the controller mode slope is approximately
19mV/dB (RF = 100MHz).
Layout Considerations
As with any RF circuit, the layout of the MAX2014 circuit
affects the device’s performance. Use an abundant num-
ber of ground vias to minimize RF coupling. Place the
input capacitors (C1, C2) and the bypass capacitors
(C3–C6) as close to the IC as possible. Connect the
bypass capacitors to the ground plane with multiple vias.
MAX2014
C6
R4
C1
C5
1
2
OUT
SET
V
S
C4 C3
4
V
CC
V
CC
INLO
V
OUT
V
SET
20kΩ
20kΩ
INHI
7
8
RFIN
C2
3
DETECTORS
GND
6
PWDN
5
Figure 2. Controller-Mode Typical Application Circuit
MAX2014
OUT
SET
20kΩ
20kΩ
IN
COUPLER
LOGARITHMIC
DETECTOR
TRANSMITTER
POWER AMPLIFIER
GAIN-CONTROL INPUT
SET-POINT
DAC
Figure 3. System Diagram for Automatic Gain-Control Loop
1
+
34
865
EP
OUT GND PWDN
2
7
SET
INLO V
CC
V
CC
INHI
TDFN
TOP VIEW
MAX2014
Pin Configurations
+
V
CC
TOP VIEW
µMAX
2
7 SET
INHI
1
8 OUT
GND
INLO 3
6
PWDN
V
CC
4
5
MAX2015