Datasheet

Detailed Description
4-Wire Serial Interface
The MAX2880 serial interface contains five read-write and
one read-only 32-bit registers. The 29 most-significant
bits (MSBs) are data, and the three least-significant bits
(LSBs) are the register address. Register data is loaded
MSB first through the 4-wire serial port interface (SPI).
When latch enable (LE) is logic-low, the logic level at
DATA is shifted at the rising edge of CLK. At the rising
edge of LE, the 29 data bits are latched into the register
selected by the address bits. Default values are not guar-
anteed upon power-up. Program all register values after
power-up.
Register programming order should be address 0x04,
0x03, 0x02, 0x01, and 0x00. Several bits are dou ble
buffered to update the settings at the same time. See the
register descriptions for double buffered settings.
Any register can be read back through the MUX pin. The
user must first set MUX bits = 0111. Next, write the regis-
ter to be read, but with the READ bit of that register (the
MSB) = 1. If the READ bit is set, the data of bits 30:3 do
not matter because they are not latched into the register
on a read operation. After the address bits are clocked
and the LE pin is set, the MSB of that register appears on
the MUX pin after the next rising edge on CLK pin. The
MUX pin will continue to change after the rising edge of
the next 28 clocks. After the LSB has been read, the user
can reset the MUX bits to 0000.
Shutdown Mode
The MAX2880 can be put into shutdown mode by setting
SHDN = 1 (register 3, bit 5) or by setting the CE pin to
logic-low.
Figure 1. SPI Timing Diagram
Figure 2. Initiating Readback
LE
t
DS
t
DH
t
CL
t
LEH
CLK
DATA
BIT31 BIT30 BIT29 BIT1 BIT0
t
LES
t
CH
t
CP
t
LEW
LE
CLK
32
DATA
3130291 33 34 35
t
MS
t
MH
36
DON’T CARE
A2 A1 A0
MUX_OUT
MAX2880 250MHz to 12.4GHz, High-Performance,
Fractional/Integer-N PLL
www.maximintegrated.com
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