Datasheet

Table 10. Register 6 (Read-Only Register)
Table 9. Register 4 (Address: 100, Default: 00000004 Hex)
BIT LOCATION BIT ID NAME DEFINITION
31 READ Register Read
0 = Write to register
1 = Read from register
30:22 Unused Unused Write to all 0’s
21 SDREF
Shutdown
Reference
Shutdown Reference Stage
0 = Reference stage enabled
1 = Reference stage disabled
20:19 CDM[1:0]
Clock-Divider
Mode
Sets Clock-Divider Mode
00 = Clock divider off
01 = Fast-lock enabled
10 = Phase adjustment
11 = ADC clock
18:7 CDIV[11:0]
Clock-Divider
Value
Sets 12-Bit Clock-Divider Value
000000000000 = Unused
000000000001 = 1
000000000010 = 2
-----
111111111111 = 4095
BIT LOCATION BIT ID NAME DEFINITION
31 READ READ
0 = N/A
1 = Read from register
30:13 Unused Unused
11 POR
Power on
Reset
POR Readback Status
0 = POR has been read back
1 = POR has not been read back (registers at default)
10 ADCV
ADC Data
Valid
ADC Data Valid
0 = ADC converting
1 = ADC data valid
9:3 ADC[6:0]
ADC output
value
2:0 ADDR[2:0]
Register
Address
Register address bits
MAX2880 250MHz to 12.4GHz, High-Performance,
Fractional/Integer-N PLL
www.maximintegrated.com
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