Datasheet

MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
25
Maxim Integrated
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages
. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
8 SOT23 K8SN+1
21-0078
90-0176
9 UCSP B9+2
21-0093
Refer to
Application
Note 1891
12 UCSP B12+1
21-0104
Refer to
Application
Note 1891
8 TDFN T833+2
21-0137 90-0059
14 TDFN T1433+2
21-0137 90-0063
14 TSSOP U14+1
21-0066
90-0113