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General Description

The MAX3804 driver with integrated analog equalizer

compensates up to 20dB of loss at 5GHz. It is designed

to ensure PC board signal integrity up to 12.5Gbps,

where frequency-dependent skin effect and dielectric

losses typically produce unacceptable amounts of inter-

symbol interference. The MAX3804 can extend the practi-

cal chip-to-chip transmission distance for 10Gbps NRZ

serial data up to 30in (0.75m) on FR-4, and it significantly

decreases deterministic jitter. Residual jitter after equal-

ization for 10.7Gbps signals is typically 24ps

P-P

on the

maximum path length.

The MAX3804 is ideal for 10Gbps chip-to-chip serial

interconnections on inexpensive FR-4 material. Its

3mm ✕ 3mm package affords optimal placement and

routing flexibility. It has separate V

connections for

internal logic and current-mode logic (CML) I/O. This

allows the CML input and output to be referenced to iso-

lated supplies, providing independent DC-coupled inter-

facing to 1.8V, 2.5V, or 3.3V ICs. Eight discrete levels of

input equalization can be selected through a digital con-

trol input, enabling the equalizer to be matched to a

range of transmission line path loss. When correctly set to

match the path loss, the MAX3804 provides optimal per-

formance over a wide range of data rates and formats.

Applications

OC-192 and 10Gb Ethernet Switches and Routers

OC-192 and 10Gb Ethernet Serial Modules

High-Speed Signal Distribution

Features

♦ Compensates Up to 30in (0.75m) of 6-mil FR-4

Transmission Line Loss

♦ 115mW Operating Power

♦ Up to 12.5Gbps Data Rate

♦ Compatible with 8B10B, 64B66B, and PRBS Data

♦ Less than 30ps

P-P

Residual Jitter After

Equalization

♦ 3-Bit Equalization Level Select Input

♦ 3mm x 3mm Thin QFN Package

♦ DC-Coupling to 1.8V, 2.5V, or 3.3V CML I/O

♦ -40°C to +85°C Operation

♦ +3.3V Core Supply Voltage

MAX3804

12.5Gbps Settable Receive Equalizer

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

SDI-

SDI+

SDI-

SDI+

SDO-

SDO+

SDO-IN

SDO+

MAX3804

CC2

CC1

10Gbps

SERDES

10Gbps

SERIAL OPTICAL

MODULE

30in OF FR-4 STRIPLINE OR

MICROSTRIP TRANSMISSION LINE

+3.3V

GNDEQ3EQ2EQ1

+2.5V

+1.8V

Typical Operating Circuit

19-2713; Rev 1; 11/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART TEMP RANGE

PIN-

PACKAGE

CODE

MAX3804ETE -40°C to +85°C

16 Thin QFN

(3mm x 3mm)

T1633F-3

Pin Configuration appears at end of data sheet.

Summary of content (9 pages)

PAGE 1
9-2713; Rev 1; 11/03 KIT ATION EVALU E L B AVAILA 12.5Gbps Settable Receive Equalizer Features ♦ Compensates Up to 30in (0.75m) of 6-mil FR-4 Transmission Line Loss ♦ 115mW Operating Power ♦ Up to 12.5Gbps Data Rate ♦ Compatible with 8B10B, 64B66B, and PRBS Data ♦ Less than 30psP-P Residual Jitter After Equalization ♦ 3-Bit Equalization Level Select Input ♦ 3mm x 3mm Thin QFN Package ♦ DC-Coupling to 1.8V, 2.5V, or 3.3V CML I/O ♦ -40°C to +85°C Operation ♦ +3.
PAGE 2
MAX3804 12.5Gbps Settable Receive Equalizer ABSOLUTE MAXIMUM RATINGS Supply Voltage (VCC) ............................................-0.5V to +4.0V CML Supply Voltage (VCC1, VCC2) ............-0.5V to (VCC + 0.5V) Current at Serial Output (SDO+, SDO-) ............................±25mA Input Voltage (SDI+, SDI-, EQ1, EQ2, EQ3) ..............................................-0.5V to (VCC + 0.5V) Continuous Power Dissipation (TA = +85°C) 16-Lead Thin QFN-EP (derate 17.5mW/°C above +85°C) ....................
PAGE 3
12.5Gbps Settable Receive Equalizer 40 27PRBS WITH 100 CIDs AT 9.953Gbps 25 20 15 K28.5 AT 12.5Gbps 10 35 400mVP-P INPUT AMPLITUDE 30 RESIDUAL JITTER (psP-P) 55 30in OF FR-4 TRANSMISSION LINE 30 RESIDUAL JITTER (psP-P) SUPPLY CURRENT (mA) 70 35 MAX3804 toc02 VCC = VCC1 = VCC2 = 3.3V MAX3804 toc01 85 RESIDUAL JITTER vs. FR-4 PATH LENGTH 27PRBS WITH 100 MAX3804 toc03 RESIDUAL JITTER vs. INPUT AMPLITUDE SUPPLY CURRENT vs. TEMPERATURE CIDs AT 9.953Gbps 25 20 15 10 K28.5 AT 12.
PAGE 4
Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) 60mV/ div EQUALIZER OUTPUT EYE AFTER 30in OF FR-4 (K28.5 AT 12.5Gbps) MAX3804 toc09 EQUALIZER OUTPUT EYE AFTER 30in OF FR-4 (27PRBS WITH 100 CIDs AT 10.7Gbps) MAX3804 toc08 EQUALIZER INPUT EYE AFTER 30in OF FR-4 (27PRBS WITH 100 CIDs AT 10.7Gbps) MAX3804 toc07 60mV/ div 60mV/ div 16ps/div 16ps/div EQUALIZER OUTPUT EYE AFTER 30in OF FR-4 (27PRBS WITH 100 CIDs AT 3.
PAGE 5
12.5Gbps Settable Receive Equalizer PIN NAME FUNCTION 1, 4 VCC1 CML Input Supply Voltage. Connect to +1.8V to +3.3V for DC-coupled CML. Input can also be AC-coupled. 2 SDI+ Positive Serial Data Input, CML 3 SDI- Negative Serial Data Input, CML 5 EQ1 Equalizer Boost Control Logic Input LSB, LVTTL. See Table 1. 6 EQ2 Equalizer Boost Control Logic Input, LVTTL. See Table 1. 7 EQ3 Equalizer Boost Control Logic Input MSB, LVTTL. See Table 1.
PAGE 6
MAX3804 12.5Gbps Settable Receive Equalizer VCC2 VCC1 FLATRESPONSE AMPLIFIER 50Ω VARIABLE ATTENUATOR 50Ω 50Ω SDI+ ∑ CML SDIBOOSTRESPONSE AMPLIFIER 50Ω SDO+ LIMITING AMP CML SDO- VARIABLE ATTENUATOR MAX3804 EQ1 EQ2 EQ3 DIGITALTO-ANALOG CONVERTER Figure 1.
PAGE 7
12.5Gbps Settable Receive Equalizer GND VCC N.C. N.C. 16 15 14 13 EQ3 EQ2 EQ1 NOMINAL 6-mil FR-4 MICROSTRIP LENGTH (in) 0 0 0 2 VCC1 1 12 VCC2 0 0 1 6 SDI+ 2 11 SDO+ 10 SDI- 3 10 SDO- VCC1 4 9 VCC2 0 0 18 1 0 1 22 1 1 0 26 1 1 1 30 8 1 GND 14 7 1 EQ3 1 6 0 5 0 EQ2 1 EQ1 0 MAX3804 Thin QFN* (3mm x 3mm) *THE EXPOSED PAD MUST BE CONNECTED TO CIRCUIT BOARD GROUND FOR PROPER THERMAL AND ELECTRICAL PERFORMANCE.
PAGE 8
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 12x16L QFN THIN.EPS MAX3804 12.5Gbps Settable Receive Equalizer D2 0.10 M C A B b D D2/2 D/2 E/2 E2/2 CL -A- (NE - 1) X e E E2 L -B- k e CL (ND - 1) X e CL CL 0.10 C 0.08 C A A2 A1 L L e e PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE 12 & 16L, QFN THIN, 3x3x0.
PAGE 9
12.5Gbps Settable Receive Equalizer EXPOSED PAD VARIATIONS NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5.