Datasheet

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General Description

The MAX3980 quad equalizer provides compensation

for transmission medium losses for four “lanes” of digi-

tal NRZ data at a 3.125Gbps data rate in one package.

It is tailor-made for 10-Gigabit Ethernet (10GbE) back-

plane applications requiring attenuation of noise and jit-

ter that occur in communicating from MAC to PMD or

from MAC to Switch. In support of the IEEE-802.3ae for

the XAUI interface, the MAX3980 adaptively allows

XAUI lanes to reach up to 40in (1.0m) on FR-4 board

material.

The equalizer has 100Ω differential CML data inputs

and outputs.

The MAX3980 is available in a 44-pin exposed-pad

QFN package. The MAX3980 consumes only 700mW at

+3.3V or 175mW per channel.

Applications

IEEE-802.3ae XAUI Interface (3.125Gbps)

InfiniBand

(2.5Gbps)

Features

♦ Four Differential Digital Data “Lanes” at

3.125Gbps

♦ Spans 40in (1.0m) of FR-4 PC Board

♦ Receiver Equalization Reduces Intersymbol

Interference (ISI)

♦ Low-Power, 175mW per Channel

♦ Standby Mode—Power-Down State

♦ Single +3.3V Supply

♦ Signal Detect

MAX3980

3.125Gbps XAUI Quad Equalizer

________________________________________________________________

Maxim Integrated Products

Ordering Information

LINE CARD

PMD MAC

10GbE

4 4 4

4 x 3.125Gbps

4 x

3.125Gbps

SWITCH

≤ 40in (1.0m)

SWITCH CARD

MAX3980

OUT IN

+3.3V

SUPPLY

MAX3980

IN OUT

+3.3V

SUPPLY

PC BOARD

BACKPLANE

≤ 40in (1.0m)

Typical Application Circuit

19-2153; Rev 3; 12/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Pin Configuration appears at end of data sheet.

EVALUATION KIT

AVAILABLE

PART TEMP RANGE PIN-PACKAGE

MAX3980UGH 0°C to +85°C 44 QFN-EP*

MAX3980UTH+ 0°C to +85°C 44 TQFN-EP*

Denotes a lead-free/RoHS-compliant package.

EP = Exposed pad.

InfiniBand is a trademark and service mark of the InfiniBand Trade Association.

Summary of content (9 pages)

PAGE 1
9-2153; Rev 3; 12/08 KIT ATION EVALU E L B AVAILA 3.125Gbps XAUI Quad Equalizer Features The MAX3980 quad equalizer provides compensation for transmission medium losses for four “lanes” of digital NRZ data at a 3.125Gbps data rate in one package. It is tailor-made for 10-Gigabit Ethernet (10GbE) backplane applications requiring attenuation of noise and jitter that occur in communicating from MAC to PMD or from MAC to Switch. In support of the IEEE-802.
PAGE 2
MAX3980 3.125Gbps XAUI Quad Equalizer ABSOLUTE MAXIMUM RATINGS Operating Ambient Temperature Range ................0°C to +85°C Storage Temperature Range .............................-55°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Supply Voltage, VCC..............................................-0.5V to +4.0V Voltage at SDET, IN_±................................-0.5V to (VCC + 0.5V) Current Out of OUT_±.......................................
PAGE 3
.125Gbps XAUI Quad Equalizer (VCC = +3.0V to +3.6V, input data rate = 3.125Gbps, TA = 0°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Low Voltage 0.8 V Input High Current 250 μA Input Low Current 500 μA TTL CONTROL PINS Input High Voltage 2.0 Output High Voltage Internal 10kΩ pullup Output Low Voltage Internal 10kΩ pullup V 2.4 V 0.4 V Note 1: K28.
PAGE 4
Typical Operating Characteristics (VCC = +3.3V, 3.125Gbps, 500mVp-p board input with 27 - 1 PRBS, TA = +25°C, unless otherwise noted.
PAGE 5
3.125Gbps XAUI Quad Equalizer PIN NAME FUNCTION 1, 5, 9, 13, 23, 27, 31, 35 VCC +3.
PAGE 6
3.125Gbps XAUI Quad Equalizer MAX3980 Functional Diagram IP1, IN1 ONLY IN1+ IN1- 2 2 SIGNAL DETECT TTL OUT1+ 3 3 CML 4 4 3 3 EN SDET FUNCTION IS INDEPENDENT OF EN OUT1- 2 2 2 2 LIMITING AMP EQUALIZER 2 3 4 4 4 POWER MANAGEMENT Detailed Description Receiver and Transmitter The receiver accepts four lanes of 3.125Gbps currentmode logic (CML) digital data signals. The adaptive equalizer compensates each received signal for dielectric and skin losses.
PAGE 7
3.125Gbps XAUI Quad Equalizer MAX3980 VCC VCC 50Ω 50Ω 1.2kΩ OUT+ 50Ω 50Ω OUT- IN+ Q1 Q2 INDATA 200μA ESD STRUCTURES ESD STRUCTURES Figure 2. CML Input Buffer Figure 3. CML Output Buffer Signal Detect with Standby Mode Layout Considerations Signal activity is detected on channel 1 only. When the peak-to-peak differential voltage at IN1± is less than 30mVp-p, the TTL output SDET goes low. When the peak-to-peak differential voltage becomes greater than 100mVp-p, SDET is asserted high.
PAGE 8
3.125Gbps XAUI Quad Equalizer MAX3980 Pin Configuration Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. VCC GND 34 35 36 37 38 39 N.C. N.C. N.C. GND OUT1+ OUT141 40 EN N.C. 43 42 SDET 44 TOP VIEW VCC 1 33 IN1+ IN1GND 2 32 3 31 OUT2+ OUT2VCC 4 30 GND VCC IN2+ 5 29 IN2GND VCC 7 27 8 26 OUT3+ OUT3VCC GND 9 25 IN3+ IN3- 10 24 6 *EP DOCUMENT NO.
PAGE 9
3.125Gbps XAUI Quad Equalizer REVISION NUMBER REVISION DATE 0 9/01 1 5/03 DESCRIPTION Initial release. — Added the package code to the Ordering Information table. 1 Updated the 21-0092 package drawing in the Package Information section. 2 3 PAGES CHANGED 8, 9 Added the TQFN package to the Ordering Information table. 1 Added the 21-0144 package drawing to the Package Information section. 10 Changed the Absolute Maximum Ratings of SDET, IN_± from +5.0V to (VCC to 0.5V) to –5.