Datasheet

MAX4810/MAX4811/MAX4812
Dual, Unipolar/Bipolar, High-Voltage
Digital Pulsers
12 ______________________________________________________________________________________
C
OUT
= 100pF and R
OUT
= 100Ω load, additional 10µF
(typ) capacitor is recommended. V
SS
is the substrate
voltage and must be connected to a voltage equal to or
more negative than the more negative voltage of V
NN1
or V
NN2
.
Exposed Pad and Layout Concerns
The MAX4810/MAX4811/MAX4812 provide an exposed
pad (EP) underneath the TQFN package for improved
thermal performance. EP is internally connected to V
SS
.
Connect EP to V
SS
externally and do not run traces
under the package to avoid possible short circuits. To
aid heat dissipation, connect EP to a similarly sized pad
on the component side of the PCB. This pad should be
connected through to the solder-side copper by several
plated holes to a large heat spreading copper area to
conduct heat away from the device.
The MAX4810/MAX4811/MAX4812 high-speed pulsers
require low-inductance bypass capacitors to their sup-
ply inputs. High-speed PCB trace design practices are
recommended. Pay particular attention to minimize
LEVEL
SHIFTER
V
DD
V
CC_
C
DP_
INP_
V
PP_
C
GP_
OP_
V
SS
LEVEL
SHIFTER
V
DD
V
CC_
V
SS
OCN_
GND
LEVEL
SHIFTER
V
DD
V
CC_
C
DN_
INN_
V
SS
ON_
V
NN_
C
GN_
V
SS
SHORT
CIRCUIT
LEVEL
SHIFTER
V
DD
V
EE_
C
DC_
C
GC_
INC_
EN_
GND
_
OCP_
V
SS
MAX4810
SHDN
C
GC_
GND
C
DC_
V
EE_
C
DN_
C
GN_
V
DD
V
CC_
C
DP_
C
GP_
Figure 1. MAX4810 Simplified Functional Diagram for One Channel