Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) PDIP 24

_______________General Description

The MAX503 is a low-power, 10-bit, voltage-output digital-

to-analog converter (DAC) that uses single 5V or dual ±5V

supplies. This device has an internal voltage reference plus

an output buffer amplifier. Operating current is only 250µA

from a single 5V supply, making it ideal for portable and

battery-powered applications. In addition, the shrink small-

outline package (SSOP) measures only 0.1 square inches,

using less board area than an 8-pin DIP. 10-bit resolution is

achieved through laser trimming of the DAC, op amp, and

reference. No further adjustments are necessary.

Internal gain-setting resistors can be used to define a DAC

output voltage range of 0V to +2.048V, 0V to +4.096V, or

±2.048V. Four-quadrant multiplication is possible without

the use of external resistors or op amps. The parallel logic

inputs are double buffered and are compatible with 4-bit, 8-

bit, and 16-bit microprocessors. For a hardware and soft-

ware compatible 12-bit upgrade, refer to the MAX530 data

sheet. For DACs with similar features but with a serial data

interface, refer to the MAX504/MAX515 data sheet.

________________________Applications

Battery-Powered Data-Conversion Products

Minimum Component-Count Analog Systems

Digital Offset/Gain Adjustment

Industrial Process Control

Arbitrary Function Generators

Automatic Test Equipment

Microprocessor-Controlled Calibration

____________________________Features

♦ Buffered Voltage Output

♦ Internal 2.048V Voltage Reference

♦ Operates from Single 5V or Dual ±5V Supplies

♦ Low Power Consumption:

250µA Operating Current

40µA Shutdown-Mode Current

♦ SSOP Package Saves Space

♦ Relative Accuracy: ±

LSB Max Over

Temperature

♦ Guaranteed Monotonic Over Temperature

♦ 4-Quadrant Multiplication with No External

Components

♦ Power-On Reset

♦ Double-Buffered Parallel Logic Inputs

______________Ordering Information

MAX503

5V, Low-Power, Parallel-Input,

Voltage-Output, 10-Bit DAC

________________________________________________________________

Maxim Integrated Products

D6/S0

ROFS

RFB

D9/D1

D8/D0

D7/S1

TOP VIEW

VOUT

REFOUT

REFGND

LDAC

CLR

AGND

REFIN

DGND

DIP/SO/SSOP

MAX503

__________________Pin Configuration

MAX503

REFOUT REFIN ROFS

2.048V

REFERENCE

POWER-ON

RESET

DAC

CONTROL

LOGIC

REFGND

AGND

CLR

LDAC

DGND

VOUT

RFB

DAC LATCH

NBL

INPUT

LATCH

D6/S0

D7/S1

D8/D0

D9/D1

NBM

INPUT

LATCH

NBH

INPUT

LATCH

24 1

234567

18 13 22

10-BIT DAC LATCH

________________Functional Diagram

Call toll free 1-800-998-8800 for free samples or literature.

PART TEMP. RANGE PIN-PACKAGE

MAX503CNG 0°C to +70°C 24 Narrow Plastic DIP

MAX503CWG 0°C to +70°C 24 Wide SO

MAX503CAG 0°C to +70°C 24 SSOP

19-0279; Rev 0; 8/94

Refer to the MAX530 for military temperature or die equivalents.

MAX503ENG -40°C to +85°C 24 Narrow Plastic DIP

MAX503EWG -40°C to +85°C 24 Wide SO

MAX503EAG -40°C to +85°C 24 SSOP

Summary of content (16 pages)

PAGE 1
9-0279; Rev 0; 8/94 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC ________________________Applications Battery-Powered Data-Conversion Products Minimum Component-Count Analog Systems Digital Offset/Gain Adjustment Industrial Process Control Arbitrary Function Generators Automatic Test Equipment Microprocessor-Controlled Calibration ________________Functional Diagram REFOUT 18 21 RFB 20 15 CLR 8 A0 9 A1 11 CS WR 10 16 LDAC VOUT DAC POWER-ON RESET 23 MAX503 NBL INPUT LATCH NBM INPUT LA
PAGE 2
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC ABSOLUTE MAXIMUM RATINGS VDD to DGND and VDD to AGND ................................-0.3V, +6V VSS to DGND and VSS to AGND .................................-6V, +0.3V VDD to VSS ............................................................... -0.3V, +12V AGND to DGND........................................................-0.3V, +0.3V REFGND to AGND.........................................-0.3V, (VDD + 0.3V) Digital Input Voltage to DGND .....
PAGE 3
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC (VDD = 5V, VSS = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT = 33µF, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX TA = +25°C 2.024 2.048 2.072 MAX503C 2.015 2.081 MAX503E 2.011 2.
PAGE 4
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies (VDD = 5V, VSS = -5V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT = 33µF, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS +0.
PAGE 5
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC OUTPUT SOURCE CAPABILITY vs. OUTPUT PULL-UP VOLTAGE 6 4 2 6 5 4 3 2 1 0.2 0.8 0.6 0.4 REFERENCE VOLTAGE vs. TEMPERATURE 1 2 4 3 5 CODE = ALL 0s, DUAL SUPPLIES (±5V) 1 10 100k 1M GAIN vs. FREQUENCY REFIN = 4Vp-p 2 0 280 -2 270 260 -4 -6 -8 250 DUAL SUPPLIES (±5V) -10 240 -12 -14 230 2.045 10k 4 GAIN (dB) SUPPLY CURRENT (µA) 290 1k 100 FREQUENCY (Hz) MAX503-5 300 MAX503-4 2.
PAGE 6
____________________________Typical Operating Characteristics (continued) (Single +5V supply, unity gain, code = all 1s, TA = +25°C, unless otherwise noted.) REFERENCE OUTPUT VOLTAGE vs. REFERENCE LOAD CURRENT SUPPLY CURRENT vs. REFIN MAX503-10 REFGND = AGND 2.0475 REFERENCE OUTPUT (V) 200 150 100 2.0480 MAX503-9 250 SUPPLY CURRENT (µA) MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC REFGND = VDD 50 2.0470 2.0465 2.0460 2.0455 EXTERNAL REFERENCE 2.
PAGE 7
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC PIN NAME FUNCTION 1 D7/ S1 D7 input when A0 = A1 = 1, or S1 input when A0 = 0 and A1 = 1. Always set S1 to 0.* 2 D8/ D0 D8 input when A0 = A1 = 1, or D0 input when A0 = 0 and A1 = 1.* 3 D9/ D1 D9 input when A0 = A1 = 1, or D1 input when A0 = 0 and A1 = 1.* 4 D2 D2 Input Data, or tie to S0 and multiplex when A0 = 1 and A1 = 0.* 5 D3 D3 Input Data, or tie to S1 and multiplex when A0 = 1 and A1 = 0.
PAGE 8
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC ________________Detailed Description The MAX503 consists of a parallel-input logic interface, a 10-bit R-2R ladder, a reference, and an op amp. The Functional Diagram shows the control lines and signal flow through the input data latch to the DAC latch, as well as the 2.048V reference and output op amp. Total supply current is typically 250µA with a single +5V supply.
PAGE 9
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC TOTAL REFERENCE NOISE CS CREFOUT REFERENCE NOISE (µVRMS) 1.6 250 1.4 CREFOUT = 3.3µF 200 1.2 1.0 150 0.8 100 0.6 50 CREFOUT = 47µF 0.4 REFERENCE NOISE (mVp-p) 1.8 SINGLE POLE ROLLOFF MAX503-FIG02 TEK 7A22 300 0.2 0 0.1 1 10 100 0.0 1000 FREQUENCY (kHz) Figure 2. Reference Noise vs. Frequency An external reference in the range (V SS + 2V) to (VDD - 2V) may be used with the MAX503 in dual-supply, unity-gain operation.
PAGE 10
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC REFOUT REFIN ROFS 33µF 2.048V REFERENCE RFB REFGND VOUT 2N7002 DAC AGND DGND POWER-ON RESET MAX503 VDD 10-BIT DAC LATCH +5V CLR CLR VSS NBL INPUT LATCH A0 CONTROL LOGIC A1 NBM INPUT LATCH NBH INPUT LATCH CS WR LDAC D2 D4 D6/S0 D8/D0 D7/S1 D3 D5 D9/D1 Figure 3. Low-Current Shutdown Mode Table 2.
PAGE 11
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC MAX503 ADDRESS BUS VALID VIH A0–A1 VIL tAWH CS tCWS tCWH WR tAWS tWR tDS DATA BITS (8-BIT BYTE OR 4-BIT NIBBLE) CLR tDH VIH VIL DATA BUS VALID tCLR LDAC NOTE: TIMING MEASUREMENT REFERENCE LEVEL IS VIH + VIL 2 tLDAC Figure 4. MAX503 Write-Cycle Timing Diagram A small error voltage is added to the reference output by the reference current flowing through the N-channel pull-down transistor.
PAGE 12
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC D0–D3 DATA BUS D0–D3 FROM SYSTEM RESET D0–D7 D0–D3 S0, S1, D0, D1 D0–D7 FROM SYSTEM RESET D2–D5 CLR MAX503 A0, A1 MC6800 DATA BUS ∅2 S0, S1, D0–D5 MAX503 A0–A1 WR MC6809 CS LDAC WR CLR CS LDAC E EN R/W ADDRESS BUS A0–A15 A0, A1 R/W DECODER EN A0–A15 ADDRESS BUS A0 A13–A15 DECODER A13–A15 Figure 7. 8-Bit and 16-Bit µP Interface Figure 5.
PAGE 13
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC MAX503 A0 = A1 = 0 NBL & NBM A0 = A1 = 1 NBH CS WR LDAC = 0 (DAC LATCH IS TRANSPARENT) DAC UPDATE Figure 8b. 8-Bit and 16-Bit µP Timing Sequence with LDAC = 0 +5V REFIN +5V VDD REFIN ROFS REFOUT VDD REFOUT 33µF 33µF AGND MAX503 ROFS RFB MAX503 RFB AGND DGND VOUT VOUT REFGND VOUT DGND VOUT REFGND VSS G=1 0V TO -5V VSS G=2 0V TO -5V Figure 9. Unipolar Configuration (0V to +2.048V Output) Figure 10.
PAGE 14
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC Table 3.
PAGE 15
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC VDD REFIN ROFS REFOUT MAX503 +5V +5V REFIN REFIN ROFS REFGND 33µF MAX503 AGND RFB MAX503 RFB AGND DGND VOUT VOUT DGND VOUT VOUT REFGND VSS -5V Figure 11. Bipolar Configuration (-2.048V to +2.048V Output) __________Applications Information Single-Supply Linearity As with any amplifier, the MAX503’s output op amp offset can be positive or negative. When the offset is positive, it is easily accounted for.
PAGE 16
MAX503 5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC 5 POSITIVE OFFSET OUTPUT (LSBs) 4 3 2 NEGATIVE OFFSET 1 0 1 2 3 4 5 DAC CODE (LSBs) Figure 13. Single-Supply DAC Transfer Function Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.