Datasheet

MAX5066
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
______________________________________________________________________________________ 17
prevent shoot-through currents during transition. Figure 7
shows the dual-phase, single-output buck regulator.
Design Procedures
Inductor Selection
The switching frequency per phase, peak-to-peak ripple
current in each phase, and allowable voltage ripple at
the output, determine the inductance value. Selecting
higher switching frequencies reduces the inductance
requirement, but at the cost of lower efficiency due to
the charge/discharge cycle of the gate and drain
capacitances in the switching MOSFETs. The situation
worsens at higher input voltages, since capacitive
switching losses are proportional to the square of the
input voltage. Lower switching frequencies on the other
hand will increase the peak-to-peak inductor ripple cur-
rent (∆I
L
) and therefore increase the MOSFET conduc-
tion losses (see the Power MOSFET Selection section for
a detailed description of MOSFET power loss).
When using higher inductor ripple current, the ripple
cancellation in the multiphase topology, reduces the
input and output capacitor RMS ripple current. Use the
following equation to determine the minimum induc-
tance value:
Choose ∆I
L
to be equal to about 30% of the output cur-
rent per channel. Since ∆I
L
affects the output-ripple volt-
age, the inductance value may need minor adjustment
after choosing the output capacitors for full-rated efficien-
cy. Choose inductors from the standard high-current, sur-
face-mount inductor series available from various
manufacturers. Particular applications may require cus-
tom-made inductors. Use high-frequency core material
for custom inductors. High ∆I
L
causes large peak-to-peak
flux excursion increasing the core losses at higher
frequencies. The high-frequency operation coupled with
high ∆I
L
, reduces the required minimum inductance and
even makes the use of planar inductors possible. The
advantages of using planar magnetics include low-profile
design, excellent current sharing between phases due to
the tight control of parasitics, and low cost. For example,
the minimum inductance at V
IN
= 12V, V
OUT
= 0.8V, ∆I
L
= 3A, and f
SW
= 500kHz is 0.5µH.
The average current-mode control feature of the
MAX5066 limits the maximum inductor current, which
prevents the inductor from saturating. Choose an
inductor with a saturating current greater than the
worst-case peak inductor current:
where 24.75mV is the maximum average current-limit
threshold for the current-sense amplifier and R
SENSE
is
the sense resistor.
Power MOSFET Selection
When choosing the MOSFETs, consider the total gate
charge, R
DS(ON)
, power dissipation, the maximum
drain-to-source voltage, and package thermal imped-
ance. The product of the MOSFET gate charge and on-
resistance is a figure of merit, with a lower number
signifying better performance. Choose MOSFETs opti-
mized for high-frequency switching applications. The
average gate-drive current from the MAX5066’s output
is proportional to the total capacitance it drives at DH1,
DH2, DL1, and DL2. The power dissipated in the
MAX5066 is proportional to the input voltage and the
average drive current. See the Supply Voltage
Connection (V
IN
/V
REG
) and the Low-Side MOSFET
Drives Supply (V
DD
) sections to determine the maxi-
mum total gate charge allowed from all driver outputs
together.
The losses may be broken into four categories: conduc-
tion loss, gate drive loss, switching loss and output loss.
The following simplified power loss equation is true for
both MOSFETs in the synchronous buck-converter:
For the low-side MOSFET, the P
SWITCH
term becomes
virtually zero because the body diode of the MOSFET is
conducting before the MOSFET is turned on.
Tables 1 and 2 describe the different losses and shows
an approximation of the losses during that period.
Input Capacitance
The discontinuous input-current waveform of the buck
converter causes large ripple currents in the input
capacitor. The switching frequency, peak inductor cur-
rent, and the allowable peak-to-peak voltage ripple
reflected back to the source, dictate the capacitance
requirement. Increasing the number of phases increas-
es the effective switching frequency and lowers the
peak-to-average current ratio, yielding lower input
capacitance requirement. It can be shown that the
PP P P P
LOSS CONDUCTION GATEDRIVE SWITCH OUTPUT
=+++
I
R
I
L PEAK
SENSE
L
_
.
=
×
+
−
24 75 10
2
3
∆
L
VV V
Vf I
OUT IN MAX OUT
IN SW L
=
−
××
()
()
∆