Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsPMICsPMIC - DC/DC voltage regulator Converter, Boost TQFN 32 EP

General Description

The MAX5072 is a dual-output DC-DC converter with inte-

grated high-side n-channel power MOSFETs. Each output

can be configured either as a buck converter or a boost

converter. The MAX5072 is designed to manage the

power requirements of xDSL modems. The wide 5.5V to

23V input voltage range allows for the use of inexpensive

AC adapters to power the device in xDSL modem appli-

cations. Each output is programmable down to 0.8V in the

buck mode and up to 28V in the boost mode with an out-

put voltage accuracy of ±1%. In the buck mode, convert-

er 1 and converter 2 can deliver 2A and 1A, respectively.

The output switching frequency of each converter can be

programmed from 200kHz to 2.2MHz to avoid harmonics

in the xDSL frequency band of operation. Each output

operates 180° out-of-phase, thus reducing input-capaci-

tor ripple current, size, and cost. A SYNC input facilitates

external frequency synchronization. Moreover, a CLKOUT

output provides out-of-phase clock signal with respect to

converter 2, allowing four-phase operation using two

MAX5072 ICs in master-slave configuration.

The MAX5072 includes an internal digital soft-start that

reduces inrush current, eliminates output-voltage over-

shoot, and ensures monotonic rise in output voltage dur-

ing power-up. The device includes a power-good output

and power-on reset as well as manual reset. In addition,

each converter output can be shut down individually. The

MAX5072 features a "dying gasp" output, which goes low

when the input voltage drops below a preprogrammed

voltage. Protection features include output short-circuit

protection for buck mode and maximum duty-cycle limit

for boost operation, as well as thermal shutdown.

The MAX5072 is available in a thermally enhanced 32-pin

thin QFN package that can dissipate 2.7W at +70°C ambi-

ent temperature. The device is rated for operation over the

-40°C to +85°C extended, or -40°C to +125°C automotive

temperature range.

Applications

xDSL Modems

xDSL Routers

Point-of-Load DC-DC Converters

Features

♦ 4.5V to 5.5V or 5.5V to 23V Input Supply Voltage

Range

♦ 0.8V (Buck) to 28V (Boost) Output Voltage

♦ Two Independent Output DC-DC Converters with

Internal Power MOSFETs

♦ Each Output can be Configured in Buck or Boost

Mode

♦ I

OUT1

and I

OUT2

of 2A and 1A (Respectively) in

Buck Mode

♦ 180° Out-of-Phase Operation

♦ Clock Output for Four-Phase Operation

♦ Switching Frequency Programmable from 200kHz

to 2.2MHz

♦ Digital Soft-Start and Independent Converter

Shutdown

♦ SYNC Input, Power-On Reset, Manual Reset, And

Power-Fail Output

♦ Short-Circuit Protection (Buck)/Maximum Duty-

Cycle Limit (Boost)

♦ Thermal Shutdown

♦ Thermally Enhanced 32-Pin Thin QFN Package

Dissipates up to 2.7W at +70°C

MAX5072

2.2MHz, Dual-Output Buck or Boost

Converter with POR and Power-Fail Output

________________________________________________________________ Maxim Integrated Products 1

Pin Configuration

Ordering Information

19-3503; Rev 2; 2/06

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

24 23 22 21 20 19 18

1234567

MAX5072

THIN QFN

TOP VIEW

SOURCE1

PGOOD1

SOURCE1

PGND

SGND

PGND

SOURCE2

FSEL1

BST1/VDD1

DRAIN1

EN1

FB1

COMP1

RST

BYPASS

V+

OSC

PFI

SYNC

COMP2

FB2

PFO

EN2

DRAIN2

BST2/VDD2

CLKOUT

PART TEMP RANGE PIN-PACKAGE

PKG

CODE

MAX5072ETJ -40°C to +85°C

32 Thin QFN-EP*

(5mm x 5mm)

T3255-4

*EP = Exposed pad.

Ordering Information continued at end of data sheet.

Summary of content (27 pages)

PAGE 1
9-3503; Rev 2; 2/06 KIT ATION EVALU E L B A IL AVA 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output 32 Thin QFN-EP* T3255-4 (5mm x 5mm) *EP = Exposed pad. Ordering Information continued at end of data sheet. ♦ Digital Soft-Start and Independent Converter Shutdown ♦ SYNC Input, Power-On Reset, Manual Reset, And Power-Fail Output ♦ Short-Circuit Protection (Buck)/Maximum DutyCycle Limit (Boost) ♦ Thermal Shutdown ♦ Thermally Enhanced 32-Pin Thin QFN Package Dissipates up to 2.
PAGE 2
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output ABSOLUTE MAXIMUM RATINGS V+ to PGND............................................................-0.3V to +25V SGND to PGND .....................................................-0.3V to +0.3V VL to SGND...................-0.3V to the lower of +6V or (V+ + 0.3V) BST1/VDD1, BST2/VDD2, DRAIN_, PFO, RST, PGOOD1 to SGND .................................................................-0.
PAGE 3
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output (V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic), ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 250 nA VOLTAGE-ERROR AMPLIFIER FB_ Input Bias Current IFB FB_ Input Voltage Set Point FB_ to COMP_ Transconductance gM 0°C ≤ TA ≤+70°C 0.792 0.8 0.
PAGE 4
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output ELECTRICAL CHARACTERISTICS (continued) (V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic), ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SYNC = SGND, fSW = 1.25MHz 84 86 95 SYNC = SGND, fSW = 2.
PAGE 5
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output (V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic), ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 90 92.
PAGE 6
Typical Operating Characteristics (V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.) VIN = 12.0V 50 VIN = 16.0V 40 70 60 30 30 20 20 VOUT = 3.3V fSW = 2.2MHz 10 VIN = 12.0V 50 VIN = 16.0V 40 0.3 0.4 0.6 0.7 0.8 0.9 40 1.0 VOUT = 12V fSW = 2.2MHz 0.02 0.08 0.20 0.14 LOAD (A) LOAD (A) OUTPUT2 VOLTAGE (BUCK CONVERTER) vs. LOAD CURRENT VL OUTPUT VOLTAGE vs. CONVERTER SWITCHING FREQUENCY 5.50 5.45 BOTH CONVERTERS SWITCHING 5.40 5.35 VL (V) 2.55 5.30 VIN = 23V 5.25 5.20 2.
PAGE 7
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output LINE-TRANSIENT RESPONSE (BUCK CONVERTER) CONVERTER 2 LOAD-TRANSIENT RESPONSE (BUCK CONVERTER) CONVERTER 1 LOAD-TRANSIENT RESPONSE (BUCK CONVERTER) MAX5072 toc10 MAX5072 toc12 MAX5072 toc11 VOUT1 = 3.3V AC-COUPLED 400mV/div VIN 5V/div VOUT2 = 2.5V AC-COUPLED 100mV/div VOUT1 = 3.3V AC-COUPLED 200mV/div 0V VOUT1 = 3.3V/1.5A AC-COUPLED 200mV/div IOUT2 500mA/div IOUT1 1A/div 0A VOUT2 = 2.5V/0.
PAGE 8
Typical Operating Characteristics (continued) (V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.) MAX5072 toc17 SYNC 5V/div 1.8 SOURCE 1 5V/div 1.4 ROSC = 10kΩ VOUT1 RIPPLE AC-COUPLED 20mV/div 0V ISTBY (mA) 0V 0V MAX5072 toc18 V+ STANDBY SUPPLY CURRENT (ISTBY) vs. TEMPERATURE EXTERNAL SYNCHRONIZATION 1.0 ROSC = 60kΩ 0.6 CLKOUT 5V/div 0.2 -40 200ns/div -7 26 59 92 125 TEMPERATURE (°C) OUTPUT1 VOLTAGE (BUCK CONVERTER) vs. TEMPERATURE V+ SWITCHING SUPPLY CURRENT (ISUPPLY) vs.
PAGE 9
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output FOUR-PHASE OPERATION (SEE FIGURE 3) MANUAL RESET (MR) MAX5072 toc23 MAX5072 toc24 MR 5V/div RST 5V/div 0V SOURCE 1 (MASTER) SOURCE 2 VOUT1 = 3.3V 5V/div 0V (MASTER) VOUT2 = 2.5V 5V/div 0V SOURCE 1 (SLAVE) SOURCE 2 (SLAVE) 100ms/div 400ns/div Pin Description PIN 1 2 NAME CLKOUT FUNCTION Clock Output. CLKOUT is 45° phase-shifted with respect to converter 2 (SOURCE2, Figure 3).
PAGE 10
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output MAX5072 Pin Description (continued) PIN FUNCTION Oscillator Frequency Set Input. Connect a resistor from OSC to SGND (ROSC) to set the switching frequency (see the Oscillator section). Set ROSC for equal to or lower oscillator frequency than the SYNC input frequency when using external synchronization (0.2fSYNC < fOSC < 1.2fSYNC). ROSC is still required when an external clock is connected to the SYNC input.
PAGE 11
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output PIN NAME FUNCTION 28, 30 PGND Power Ground. Connect rectifier diode anode, input capacitor negative, output capacitor negative, and VL bypass capacitor returns to PGND. 29 SGND Signal Ground. Connect SGND to the exposed pad. Connect SGND and PGND together at a single point. 31, 32 SOURCE2 EP SGND Connection to the Converter 2 Internal MOSFET Source.
PAGE 12
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output Detailed Description PWM Controller The MAX5072 converter uses a pulse-width modulation (PWM) voltage-mode control scheme for each out-ofphase controller. It is nonsynchronous rectification and uses an external low-forward-drop Schottky diode for rectification.
PAGE 13
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output LDO MAX5072 VL CONVERTER 1 VL DEAD-TIME CONTROL OSCILLATOR BST1/VDD1 FREQUENCY FOLDBACK DRAIN1 BYPASS Q N Q F_SEL1 FREQUENCY DIVIDER SOURCE1 Q PGOOD1 fSW/4 VREF VREF DIGITAL SOFT-START EN1 FB1 COMP1 VCC 0.5VREF 0.
PAGE 14
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output VIN CIN V+ V+ DRAIN2 OUTPUT2 DRAIN1 SOURCE2 OUTPUT1 SOURCE1 OUTPUT4 DRAIN2 DRAIN1 SOURCE2 OUTPUT3 SOURCE1 DUTY CYCLE = 50% CLKIN SYNC CLKOUT SYNC MASTER SLAVE SYNC CLKOUT (MASTER) CLKOUT (SLAVE) SOURCE1 (MASTER) SYNCPHASE CLKOUTPHASE SOURCE2 (MASTER) SOURCE1 (SLAVE) SOURCE2 (SLAVE) CIN (RIPPLE) Figure 3.
PAGE 15
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output All internal control circuitry operates from an internally regulated nominal voltage of 5.2V (VL). At higher input voltages (V+) of 5.5V to 23V, VL is regulated to 5.2V. At 5.5V or below, the internal linear regulator operates in dropout mode, where VL follows V+. Depending on the load on VL, the dropout voltage can be high enough to reduce VL below the undervoltage lockout (UVLO) threshold. For input voltages of less than 5.
PAGE 16
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output VIN VIN VL OUTPUT2 VL VL DRAIN2 V+ DRAIN1 SOURCE2 SOURCE1 OUTPUT1 OUTPUT2 VL DRAIN2 V+ DRAIN1 SOURCE2 SOURCE1 MAX5072 FB2 OUTPUT1 MAX5072 FB1 FB2 FB1 EN2 EN1 R2 EN2 VL VL EN1 R1 VL C2 PGOOD1 SEQUENCING—OUTPUT 2 DELAYED WITH RESPECT TO OUTPUT 1. VL C1 R1/C1 AND R2/C2 ARE SIZED FOR REQUIRED SEQUENCING. Figure 4.
PAGE 17
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output LX_ MAX5072 In deep overload or short-circuit conditions when the FB voltage drops below 0.4V, the switching frequency is reduced to 1/4 x fSW to provide sufficient time for the inductor to discharge. During overload conditions, if the voltage across the inductor is not high enough to allow for the inductor current to properly discharge, current runaway may occur.
PAGE 18
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output For output voltages below 0.8V, set the MAX5072 output voltage by connecting a voltage-divider from the output to FB_ to BYPASS (Figure 6). Select RC (FB to BYPASS resistor) higher than a 50kΩ range. Calculate RA with the following equation: ⎡ V − VOUT ⎤ RA = RC ⎢ FB ⎥ ⎣ VBYPASS − VFB ⎦ where VFB = 0.8V, VBYPASS = 2V (see the Electrical Characteristics table), and VOUT_ can range from 0V to VFB_.
PAGE 19
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output Output Capacitor Selection The allowable output ripple voltage and the maximum deviation of the output voltage during step load currents determines the output capacitance and its ESR. The output ripple is comprised of ∆VQ (caused by the capacitor discharge) and ∆VESR (caused by the ESR of the capacitor). Use low-ESR ceramic or aluminum electrolytic capacitors at the output.
PAGE 20
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output CIN = VOUT ∆IL × D 4 × fSW × ∆VQ ESR = R1 - ∆VESR ∆IL COMP gM R2 VREF + RF where ∆IL (VIN − VDS ) = CF L × fSW where VDS is the total voltage drop across the internal MOSFET plus the voltage drop across the inductor ESR. ∆IL is the peak-to-peak inductor ripple current as calculated above.
PAGE 21
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output 4 For the boost converter: D IRMS = (I2DC +I2PK +(IDC × IPK )) × MAX 3 V ×I IIN = O O VIN × η ∆IL = (VIN − VDS ) × D L × fSW IDC = IIN − IPK = IIN + ∆IL 2 ∆IL 2 PDC = I2RMS × RDS(ON)MAX where VDS is the drop across the internal MOSFET. See the Electrical Characteristics for the RDS(ON)MAX value. V × I × (t R + t F ) × fSW PSW = O IN 4 where tR and tF are rise and fall times of the internal MOSFET.
PAGE 22
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output If the fZERO,ESR is lower than fC and close to fLC, use a Type II compensation network where RFCF provides a midband zero fmid,zero, and RFCCF provides a high-frequency pole. Calculate modulator gain GM at the crossover frequency. 1 fZERO, ESR = 2π × ESR × COUT 1 fLC = 2π × LOUT × COUT GM = Calculate the unity-gain crossover frequency as: VIN ESR 0.
PAGE 23
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output Calculate CI for a target unity crossover frequency, fC: GE / A = gm × RF CI = The total loop gain at fC should be equal to 1 GM × GE / A = 1 Place a pole 2π × fC × LOUT × COUT × VOSC VIN × RF 1 2π × RI × CI at fZERO,ESR. (fP1 = 1 RI = or VOSC (ESR + 2π × fC × L OUT ) VOUT RF = 0.8 × VIN × gm × ESR Place a zero at or below the LC double pole: CF = 2π × fZERO, ESR × CI Place a second zero, fZ2, at 0.
PAGE 24
MAX5072 2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output fC ≤ Place a zero (fZ1 = CF = Improving Noise Immunity fZERO, RHP 5 1 2π × R F × C F ) at 0.75 x fLC. 1 2π × 0.75 × fLC × RF PC Board Layout Guidelines where RF ≥ 10kΩ. Calculate CI for a target crossover frequency, fC: ⎡ ⎤ 2 VOSC ⎢(1 − D)2 + ω C × LO × CO ⎥ ⎢⎣ ⎥⎦ CI = ω C × RF × VIN where ωC = 2πfC. Place a pole (fP1 = RI = 1 ) 2π × RI × CI at fZERO,RHP.
PAGE 25
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output 2) Group the gate-drive components (bootstrap diodes and capacitors, and VL bypass capacitor) together near the controller IC. b) Connect this plane to SGND and use this plane for the ground connection for the reference (BYPASS), enable, compensation components, feedback dividers, and OSC resistor. c) Connect SGND and PGND together near the input bypass capacitors and the IC (this is the only connection between SGND and PGND).
PAGE 26
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) QFN THIN.EPS MAX5072 2.
PAGE 27
2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.