Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) TSSOP 16

General Description

The MAX5101 parallel-input, voltage-output, triple 8-bit

digital-to-analog converter (DAC) operates from a sin-

gle +2.7V to +5.5V supply and comes in a space-sav-

ing 16-pin TSSOP package. Internal precision buffers

swing rail-to-rail. For all three DACs, the internal refer-

ence voltage is tied to V

The MAX5101 has separate input latches for each of its

three DACs. Data is transferred to the input latches

from a common 8-bit input port. The DACs are individu-

ally selected through address inputs A0 and A1 and

are updated by bringing WR low.

The MAX5101 features a 1µA software shutdown mode,

as well as a power-on reset mode that resets all regis-

ters to code 00 hex on power-up.

Applications

Digital Gain and Offset Adjustment

Programmable Attenuators

Portable Instruments

Power-Amp Bias Control

Features

♦ +2.7V to +5.5V Single-Supply Operation

♦ Ultra-Low Supply Current

0.3mA while Operating

1µA in Software Shutdown Mode

♦ Ultra-Small 16-Pin TSSOP Package

♦ Output Buffer Amplifiers Swing Rail-to-Rail

♦ Power-On Reset Sets All Registers to Zero

MAX5101

+2.7V to +5.5V, Low-Power, Triple, Parallel

8-Bit DAC with Rail-to-Rail Voltage Outputs

________________________________________________________________ Maxim Integrated Products 1

OUTB OUTC

GND

TOP VIEW

MAX5101

TSSOP

OUTA

19-1560; Rev 1; 7/05

PART

MAX5101AEUE

MAX5101BEUE -40°C to +85°C

-40°C to +85°C

TEMP RANGE

PIN-

PACKAGE

16 TSSOP

Pin Configuration

Ordering Information

INL

(LSB)

±1

±2

Functional Diagram

OUTB

OUTC

DAC B

DAC C

INPUT

LATCH B

CONTROL

LOGIC

D0–D7

OUTA

DAC A

INPUT

LATCH A

INPUT

LATCH C

MAX5101

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Summary of content (8 pages)

PAGE 1
9-1560; Rev 1; 7/05 +2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs The MAX5101 parallel-input, voltage-output, triple 8-bit digital-to-analog converter (DAC) operates from a single +2.7V to +5.5V supply and comes in a space-saving 16-pin TSSOP package. Internal precision buffers swing rail-to-rail. For all three DACs, the internal reference voltage is tied to VDD. The MAX5101 has separate input latches for each of its three DACs.
PAGE 2
MAX5101 +2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V D_, A_, WR to GND ..................................................-0.3V to +6V OUT_ to GND ...........................................................-0.3V to VDD Maximum Current into Any Pin .........................................
PAGE 3
+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs (VDD = +2.7V to +5.5V, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3V and TA = +25°C.
PAGE 4
MAX5101 +2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ADDRESS ADDRESS VALID tWR tAS tAH- WR tDSDATA tDHDATA VALID SEE NOTE 7, ELECTRICAL CHARACTERISTICS Figure 1. Timing Diagram __________________________________________Typical Operating Characteristics (VDD = +3V, RL = 10kΩ, CL = 100pF, code = FF hex, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT (µA) VDD = 3V VOUT (V) VOUT (V) 0.8 0.6 6 VDD = 5V 4 0.4 VDD = 5V VDD = 3V 2 0.
PAGE 5
+2.7V to +5.
PAGE 6
+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs MAX5101 Pin Description PIN NAME FUNCTION 1 OUTB DAC B Voltage Output 2 OUTA DAC A Voltage Output 3 VDD Positive Supply Voltage. Bypass VDD to GND using a 0.1µF capacitor. 4 WR Write Input (active low). Use WR to load data into the DAC input latch selected by A0 and A1.
PAGE 7
+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs WR A1 A0 H X X Input data latched L L L DAC A input latch transparent L L H DAC B input latch transparent L H L DAC C input latch transparent L H H Enter shutdown mode OPERATION Chip Information TRANSISTOR COUNT: 6848 H = high state, L = low state, X = don’t care _______________________________________________________________________________________ 7 MAX5101 Table 1.
PAGE 8
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS MAX5101 +2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs PACKAGE OUTLINE, TSSOP 4.40mm BODY 21-0066 G 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product.