Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) TSSOP 16

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General Description

The MAX5102 parallel-input, voltage-output, dual 8-bit

digital-to-analog converter (DAC) operates from a single

+2.7V to +5.5V supply and comes in a space-saving

16-pin TSSOP package. Internal precision buffers

swing Rail-to-Rail

, and the reference input range

includes both ground and the positive rail. Both DACs

share a common reference input.

The MAX5102 has separate input latches for each of its

DACs. Data is transferred to the input latches from a

common 8-bit input port. The DACs are individually

selected through address input A0 and are updated by

bringing WR low.

The MAX5102 features a shutdown mode that reduces

current to 1nA, as well as a power-on reset mode that

resets all registers to code 00 hex on power-up.

Applications

Digital Gain and Offset Adjustment

Programmable Attenuators

Portable Instruments

Power-Amp Bias Control

Features

♦ +2.7V to +5.5V Single-Supply Operation

♦ Ultra-Low Supply Current

0.2mA while Operating

1nA in Shutdown Mode

♦ Ultra-Small 16-Pin TSSOP Package

♦ Ground to V

Reference Input Range

♦ Output Buffer Amplifiers Swing Rail-to-Rail

♦ Power-On Reset Sets All Registers to Zero

MAX5102

+2.7V to +5.5V, Low-Power, Dual, Parallel

8-Bit DAC with Rail-to-Rail Voltage Outputs

________________________________________________________________ Maxim Integrated Products 1

OUTA

OUTB

GND

TOP VIEW

MAX5102

TSSOP

REF

SHDN

19-1565; Rev 0; 10/99

PART

MAX5102AEUE

MAX5102BEUE -40°C to +85°C

-40°C to +85°C

TEMP. RANGE PIN-PACKAGE

16 TSSOP

Pin Configuration

Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

INL

(LSB)

±1

±2

OUTA

OUTB

MAX5102

DAC A

DAC B

INPUT

LATCH A

INPUT

LATCH B

CONTROL

LOGIC

SHDNREF

D0–D7

Functional Diagram

Summary of content (8 pages)

PAGE 1
9-1565; Rev 0; 10/99 +2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs The MAX5102 has separate input latches for each of its DACs. Data is transferred to the input latches from a common 8-bit input port. The DACs are individually selected through address input A0 and are updated by bringing WR low. Features ♦ +2.7V to +5.5V Single-Supply Operation ♦ Ultra-Low Supply Current 0.
PAGE 2
MAX5102 +2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V D_, A0, WR, SHDN to GND ......................................-0.3V to +6V REF to GND ................................................-0.3V to (VDD + 0.3V) OUT_ to GND ...........................................................-0.3V to VDD Maximum Current into Any Pin .....................................
PAGE 3
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs (VDD = VREF = +2.7V to +5.5V, GND = 0V, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = VREF = +3V and TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE 0.6 V/µs 6 µs Code 00 to code FF hex 500 nVs Digital Feedthrough (Note 5) Code 00 to code FF hex 0.
PAGE 4
MAX5102 +2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs ADDRESS ADDRESS VALID tWR tAS tAH- WR tDSDATA tDHDATA VALID Figure 1. Timing Diagram Typical Operating Characteristics (VDD = VREF = +3V, RL = 10kΩ, CL = 100pF, code = FF hex, TA = +25°C, unless otherwise noted.) DAC FULL-SCALE OUTPUT VOLTAGE vs. SOURCE CURRENT 4 VOUT (V) 0.6 VDD = VREF = 5V 0.4 VDD = VREF = 3V 3 2 1 DAC AT CODE 00 OR F0 1 DAC AT CODE 00 (RL = ∞) 190 180 1 0.
PAGE 5
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs -20 -30 -40 REF = 0.5Vp-p -50 REF = 1Vp-p -10 DAC CODE FROM 80 TO 7F HEX -20 -30 1 -40 -50 -60 2 -70 -60 -80 REF = 2Vp-p -70 MAX55102 toc09 MAX5100 toc08 0 OUTPUT AMPLITUDE (dB) DAC CODE = FF HEX VREF = SINE WAVE CENTERED AT 1.5V 1kHz FREQUENCY 500kHz FILTER -10 CODE = FF HEX REF IS IVp-p SIGNAL VREF = 1.5V -90 10 100 0.
PAGE 6
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs MAX5102 Pin Description PIN NAME FUNCTION 1 VDD Positive Supply Voltage. Bypass VDD to GND using a 0.1µF capacitor. 2 REF Reference Voltage Input 3 SHDN 4 WR 5–12 D7–D0 13 A0 14 GND Ground 15 OUTB DAC B Voltage Output 16 OUTA DAC A Voltage Output Shutdown. Connect SHDN to GND for normal operation. Write Input (active low). Use WR to load data into the DAC input latch selected by A0.
PAGE 7
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs connect an external Schottky diode between REF and VDD to ensure compliance with the absolute maximum ratings. Do not apply signals to the digital inputs before the device is fully powered up. Applications Information Power-Supply Bypassing and Ground Management External Reference The reference source resistance must be considerably less than the reference input resistance.
PAGE 8
+2.7V to +5.5V, Low-Power, Dual, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs TSSOP.EPS MAX5102 Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.