Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) QSOP 16

General Description

The MAX5104 low-power, serial, voltage-output, dual

12-bit digital-to-analog converter (DAC) consumes only

500µA from a single +5V supply. This device features

Rail-to-Rail

output swing and is available in a space-

saving 16-pin QSOP package. To maximize the dynamic

range, the DAC output amplifiers are configured with an

internal gain of +2V/V.

The 3-wire serial interface is SPI™/QSPI™/MICROWIRE™

compatible. Each DAC has a double-buffered input

organized as an input register followed by a DAC register,

which allows the input and DAC registers to be updated

independently or simultaneously with a 16-bit serial

word. Additional features include programmable power-

down (2µA), hardware power-down lockout (PDL), a

separate reference voltage input for each DAC that

accepts AC and DC signals, and an active-low clear

input (CL) that resets all registers and DACs to zero.

These devices provide a programmable logic pin for

added functionality, and a serial-data output pin for

daisy chaining.

________________________Applications

Industrial Process Control

Remote Industrial Controls

Digital Offset and Gain Adjustment

Microprocessor-Controlled Systems

Motion Control

Automatic Test Equipment (ATE)

____________________________Features

♦ 12-Bit Dual DAC with Internal Gain of +2V/V

♦ Rail-to-Rail Output Swing

♦ 12µs Settling Time

♦ +5V Single-Supply Operation

♦ Low Quiescent Current

500µA (normal operation)

2µA (power-down mode)

♦ SPI/QSPI/MICROWIRE Compatible

♦ Space-Saving 16-Pin QSOP Package

♦ Power-On Reset Clears Registers and DACs to Zero

♦ Adjustable Output Offset

MAX5104

Low-Power, Dual, Voltage-Output, 12-Bit DAC

with Serial Interface

________________________________________________________________

Maxim Integrated Products

19-1587; Rev 0; 11/99

Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.

For small orders, phone 1-800-835-8769.

REFA

AGND

DGNDPDLCL

DOUT

16-BIT

SHIFT

CONTROL

INPUT

REG A

INPUT

REG B

SCLK

UPOH REFB

DINCS

DAC B

DAC A

DAC

REG A

LOGIC

OUTPUT

DECODE

CONTROL

DAC

REG B

MAX5104

OUTB

OSB

OUTA

OSA

Functional Diagram

Pin Configuration appears at end of data sheet.

PIN-

PACKAGE

TEMP. RANGEPART

16 QSOP

16 QSOP0°C to +70°C

-40°C to +85°CMAX5104EEE

MAX5104CEE

INL

(LSB)

±4

Summary of content (12 pages)

PAGE 1
9-1587; Rev 0; 11/99 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface ________________________Applications ____________________________Features ♦ 12-Bit Dual DAC with Internal Gain of +2V/V ♦ Rail-to-Rail Output Swing ♦ 12µs Settling Time ♦ +5V Single-Supply Operation ♦ Low Quiescent Current 500µA (normal operation) 2µA (power-down mode) ♦ SPI/QSPI/MICROWIRE Compatible ♦ Space-Saving 16-Pin QSOP Package ♦ Power-On Reset Clears Registers and DACs to Zero ♦ Adjustable Output Offset Order
PAGE 2
MAX5104 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface ABSOLUTE MAXIMUM RATINGS VDD to AGND............................................................-0.3V to +6V VDD to DGND ...........................................................-0.3V to +6V AGND to DGND ..................................................................±0.3V OSA, OSB to AGND.......................(VAGND - 4V) to (VDD + 0.3V) REF_, OUT_ to AGND.................................-0.3V to (VDD + 0.
PAGE 3
Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface (VDD = +5V ±10%, VREFA = VREFB = +2.048V, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C (OS_ connected to AGND for a gain of +2V/V).) PARAMETER SYMBOL CONDITIONS MIN TYP MAX 0.13 0.40 UNITS DIGITAL OUTPUTS (DOUT, UPO) Output High Voltage VOH ISOURCE = 2mA Output Low Voltage VOL ISINK = 2mA VDD - 0.
PAGE 4
__________________________________________Typical Operating Characteristics (VDD = +5V, RL = 10kΩ, CL = 100pF, OS_ pins connected to AGND, TA = +25°C, unless otherwise noted.) -10 -12 -14 -16 600 550 CODE = 0000 (HEX) 500 -20 VREF = +2.048V RL = ∞ 400 1 370 740 1110 1480 1850 -55 -35 -15 FREQUENCY (kHz) 5 25 45 65 -80 85 105 125 1 10 TEMPERATURE (°C) FREQUENCY (kHz) FULL-SCALE ERROR vs. RESISTIVE LOAD REFERENCE FEEDTHROUGH AT 1kHz -50 MAX5104 toc04 0.50 VREF = +2.048V 0.25 0 -0.
PAGE 5
Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface DYNAMIC RESPONSE RISE TIME MAX5104 toc09 MAX5104 toc08 DYNAMIC RESPONSE FALL TIME CS 5V/div OUT_ 1V/div OUT_ 1V/div 2µs/div 2µs/div VREF = +2.048V VREF = +2.048V SUPPLY CURRENT vs. SUPPLY VOLTAGE MAJOR-CARRY TRANSITION CODE = 1FFE (HEX) MAX5104 toc11 MAX51504 toc10 0.60 0.55 CS 2V/div 0.50 CODE = OOOO (HEX) OUT_ 50mV/div AC-COUPLED 0.45 0.40 4.50 4.75 5.00 5.25 5.
PAGE 6
MAX5104 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface _____________________Pin Description PIN NAME 1 AGND Analog Ground 2 OUTA DAC A Output Voltage 3 OSA DAC A Offset Adjustment 4 REFA Reference for DAC A OS_ R FUNCTION R 2R 2R D0 R 2R D10 OUT_ R 2R 2R D11 D12 5 CL Active-Low Clear Input. Resets all registers to zero. DAC outputs go to 0V. 6 CS Chip-Select Input 7 DIN Serial-Data Input 8 SCLK Serial-Clock Input 9 DGND Digital Ground Figure 1.
PAGE 7
Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface MAX5104 Table 1. Serial-Interface Programming Commands 16-BIT SERIAL WORD FUNCTION A0 C1 C0 D11.......................D0 (MSB) (LSB) S0 0 0 1 12-bit DAC data 0 Load input register A; DAC registers are unchanged. 1 0 1 12-bit DAC data 0 Load input register B; DAC registers are unchanged. 0 1 0 12-bit DAC data 0 Load input register A; all DAC registers are updated.
PAGE 8
MAX5104 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface The MAX5104’s digital inputs are double buffered, which allows any of the following: loading the input register(s) without updating the DAC register(s), updating the DAC register(s) from the input register(s), or updating the input and DAC registers concurrently. The address and control bits allow the DACs to act independently.
PAGE 9
Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface MAX5104 tCSW CS tCSS tCSO tCL tCP tCH tCSH tCS1 SCLK tDS tDH DIN Figure 6. Detailed Serial-Interface Timing Diagram SCLK SCLK MAX5104 DIN SCLK MAX5104 DOUT DIN MAX5104 DOUT DOUT CS CS CS DIN TO OTHER SERIAL DEVICES Figure 7. Daisy Chaining MAX5104s DIN SCLK CS1 CS2 TO OTHER SERIAL DEVICES CS3 CS CS CS MAX5104 MAX5104 MAX5104 SCLK SCLK SCLK DIN DIN DIN Figure 8.
PAGE 10
MAX5104 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface Serial-Data Output The serial-data output, DOUT, is the internal shift register’s output. DOUT allows for daisy chaining of devices and data readback. The MAX5104 can be programmed to shift data out of DOUT on SCLK’s falling edge (Mode 0) or on the rising edge (Mode 1). Mode 0 provides a lag of 16 clock cycles, which maintains compatibility with SPI/QSPI and MICROWIRE interfaces. In Mode 1, the output data lags 15.5 clock cycles.
PAGE 11
Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface where NB represents the numeric value of the DAC’s binary input code. Table 3 shows digital codes and the corresponding output voltage for Figure 11’s circuit. The total harmonic distortion plus noise (THD+N) is typically less than -78dB at full scale with a 1Vp-p input swing at 5kHz.
PAGE 12
MAX5104 Low-Power, Dual, Voltage-Output, 12-Bit DAC with Serial Interface VDD OSA R MAX5104 VIN REFA R OUTA CS SCLK DIN VREF SHIFT REGISTER INPUT REG A DAC REG A DACA INPUT REG B DAC REG B DACB R1 R2 OUTB REFB VOUT R3 R4 R R [ ] [ ] = (V 2NA )( R2 )(1+ R4 ) (V [ 4096 R1+R2 R3 ] [ VOUT = GAIN – OFFSET OSB IN AGND REF 2NB 4096 )( R4R3 )] NA IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACA. NB IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACB. DGND Figure 14.