Datasheet

through a daisy-chain. The SCLK and DIN lines are
shared by all devices, but each IC needs its own dedi-
cated CS line.
Power-Supply Considerations
On power-up, the input and DAC registers clear (set to
zero code). Bypass the power supply with a 4.7µF
capacitor in parallel with a 0.1µF capacitor to GND.
Minimize lead lengths to reduce lead inductance.
Grounding and Layout Considerations
Digital and AC transient signals on GND can create
noise at the output. Connect GND to the highest quality
ground available. Use proper grounding techniques,
such as a multilayer board with a low-inductance
ground plane or star connect all ground return paths
back to the MAX5236/MAX5237 GND. Carefully lay out
the traces between channels to reduce AC cross-cou-
pling and crosstalk. Wire-wrapped boards and sockets
are not recommended. If noise becomes an issue,
shielding may be required.
Chip Information
TRANSISTOR COUNT: 4184
PROCESS: BiCMOS
MAX5236/MAX5237
Single-Supply 3V/5V, Voltage-Output, Dual,
Precision 10-Bit DACs
______________________________________________________________________________________ 17
V
OUT
GND
MAX5236
MAX5237
R2
R1
R3
DAC A
DAC
REG A
INPUT
REG A
DAC B
DAC
REG B
INPUT
REG B
SHIFT
REGISTER
R4
OUTA
121kΩ
77.25kΩ
OUTB
121kΩ
VOUT = (GAIN) (OFFSET)
NA IS THE NUMERIC VALUE OF THE INPUT CODE FOR DAC A.
NB IS THE NUMERIC VALUE OF THE INPUT CODE FOR DAC B.
77.25kΩ
REFA
SCLK
DIN
REFB
CS
V
IN
V
REF
V
DD
=
V
IN
2NA
1024
1 +
R4
R3
R2
R1 + R2
R4
R3
V
REF
2NB
1024
–
Figure 11. Digital Control of Gain and Offset
TO OTHER
SERIAL DEVICES
MAX5236
MAX5237
DIN
SCLK
CS
MAX5236
MAX5237
DIN
SCLK
MAX5236
MAX5237
DIN
SCLK
DIN
SCLK
CS1
CS2
CS3
CS CS
Figure 12. Multiple MAX5236/MAX5237 Sharing a Common DIN Line