Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 20

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__________________General Description

The MAX5253 combines four low-power, voltage-output,

12-bit digital-to-analog converters (DACs) and four pre-

cision output amplifiers in a space-saving, 20-pin pack-

age. In addition to the four voltage outputs, each

amplifier’s negative input is also available to the user.

This facilitates specific gain configurations, remote

sensing, and high output drive capacity, making the

MAX5253 ideal for industrial-process-control applica-

tions. Other features include software shutdown, hard-

ware shutdown lockout, an active-low reset which clears

all registers and DACs to zero, a user-programmable

logic output, and a serial-data output.

Each DAC has a double-buffered input organized as an

input register followed by a DAC register. A 16-bit serial

word loads data into each input/DAC register. The serial

interface is compatible with SPI™/QSPI™ and

MICROWIRE™. It allows the input and DAC registers to

be updated independently or simultaneously with a sin-

gle software command. The DAC registers can be

simultaneously updated through the 3-wire serial inter-

face. All logic inputs are TTL/CMOS-logic compatible.

________________________Applications

Industrial Process Controls

Automatic Test Equipment

Digital Offset and Gain Adjustment

Motion Control

Remote Industrial Controls

Microprocessor-Controlled Systems

______________________________Features

♦ Four 12-Bit DACs with Configurable

Output Amplifiers

♦ +3.0V to +3.6V Single-Supply Operation

♦ Low Supply Current: 0.82mA Normal Operation

3µA Shutdown Mode

♦ Reference Inputs are High Impedance in Shutdown

♦ Available in 20-Pin SSOP

♦ Power-On Reset Clears all Registers and

DACs to Zero

♦ SPI/QSPI and MICROWIRE Compatible

♦ Simultaneous or Independent Control of DACs

Through 3-Wire Serial Interface

♦ User-Programmable Digital Output

MAX5253

+3V, Quad, 12-Bit Voltage-Output DAC

with Serial Interface

________________________________________________________________ Maxim Integrated Products 1

MAX5253

OUTA

FBA

FBB

FBC

FBD

DAC A

DAC B

DAC C

DAC D

REFAB

DAC A

DECODE

CONTROL

INPUT

DAC B

INPUT

DAC C

INPUT

DAC D

INPUT

16-BIT

SHIFT

CONTROL

LOGIC

OUTPUT

DIN

SCLK

OUTB

OUTC

OUTD

DOUT

PDL

AGND

DGND

UPO REFCD

_________________________________________________________________________Functional Diagram

19-1123; Rev 1; 10/02

PART

MAX5253ACPP

MAX5253BCPP 0°C to +70°C

0°C to +70°C

TEMP RANGE PIN-PACKAGE

20 Plastic DIP

_________________Ordering Information

Ordering Information continued at end of data sheet.

Pin Configuration appears at end of data sheet.

INL

(LSB)

±1/2

±1

SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.

MAX5253ACAP

MAX5253BCAP 0°C to +70°C

0°C to +70°C 20 SSOP

20 SSOP

±1/2

±1

Summary of content (16 pages)

PAGE 1
9-1123; Rev 1; 10/02 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface ______________________________Features ♦ Four 12-Bit DACs with Configurable Output Amplifiers ♦ +3.0V to +3.6V Single-Supply Operation ♦ Low Supply Current: 0.
PAGE 2
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface ABSOLUTE MAXIMUM RATINGS VDD to AGND...............................................................-0.3V, +6V VDD to DGND ..............................................................-0.3V, +6V AGND to DGND ..................................................................±0.3V REFAB, REFCD to AGND ...........................-0.3V to (VDD + 0.3V) OUT_, FB_ to AGND...................................-0.3V to (VDD + 0.
PAGE 3
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface (VDD = +3.0V to +3.6V, AGND = DGND = 0V, REFAB = REFCD = 1.25V, RL = 5kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. Output buffer connected in unity-gain configuration (Figure 9).) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MULTIPLYING-MODE PERFORMANCE Reference -3dB Bandwidth VREF = 0.67VP-P 650 kHz Reference Feedthrough Input code = all 0s, VREF = 1.
PAGE 4
TIMING CHARACTERISTICS (VDD = +3.0V to +3.6V, AGND = DGND = 0V, REFAB = REFCD =1.25V, RL = 5kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. Output buffer connected in unity-gain configuration (Figure 9).
PAGE 5
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface TOTAL HARMONIC DISTORTION PLUS NOISE vs. LOAD 750 700 650 0.25 0.20 0.15 0.10 550 0.05 CODE = FFF HEX MAX5253-02 0.30 600 500 0 SIGNAL AMPLITUDE (dB) 0.35 THD + NOISE (%) 0.40 850 800 DAC CODE = ALL 1s REFAB = 1VP-P RL = 5kΩ CL = 100pF 0.45 900 VREF = 1kHz, 0.006V TO 1.6V RL = 5kΩ CL = 100pF -20 -40 -60 -80 -100 0.5 0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 0.1 SUPPLY VOLTAGE (V) 1 10 100 1.6 FREQUENCY (kHz) 3.8 4.
PAGE 6
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface ____________________________Typical Operating Characteristics (continued) (VDD = +3.3V, TA = +25°C, unless otherwise noted.) MAJOR-CARRY TRANSITION DIGITAL FEEDTHROUGH (SCLK = 100kHz) CS 5V/div SCLK, 2V/div OUTB, AC-COUPLED 50mV/div OUTA, AC-COUPLED 10mV/div MAX5253-07 MAX5253-08 10µs/div 2µs/div VREF = 1.25V, RL = 5kΩ, CL = 100pF VREF = 1.25V, RL = 5kΩ, CL = 100pF CS = PDL = CL = 3.
PAGE 7
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface PIN NAME FUNCTION 1 AGND 2 FBA 3 OUTA DAC A Output Voltage 4 OUTB DAC B Output Voltage 5 FBB 6 REFAB 7 CL Clears All DACs and Registers. Resets all outputs (OUT_, UPO, DOUT) to 0, active low. 8 CS Chip-Select Input. Active low. 9 DIN Serial-Data Input 10 SCLK Serial Clock Input 11 DGND Digital Ground 12 DOUT Serial-Data Output 13 UPO User-Programmable Logic Output 14 PDL Power-Down Lockout. Active low.
PAGE 8
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface FB_ R 2R 2R D0 R 2R D9 OUT_ R 2R 2R D10 D11 REF_ AGND The impedance at each reference input is code-dependent, ranging from a low value of 10kΩ when both DACs connected to the reference have an input code of 555 hex, to a high value exceeding several gigohms (leakage current) with an input code of 000 hex. Because the input impedance at the reference pins is codedependent, load regulation of the reference source is important.
PAGE 9
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface MAX5253 SCLK SK DIN SO DOUT* SI* CS I/O Serial-Interface Configurations The MAX5253’s 3-wire serial interface is compatible with both MICROWIRE (Figure 2) and SPI/QSPI (Figure 3). The serial input word consists of two address bits and two control bits followed by 12 data bits (MSB first), as shown in Figure 4. The 4-bit address/ control code determines the MAX5253’s response outlined in Table 1.
PAGE 10
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface Table 1. Serial-Interface Programming Commands 16-BIT SERIAL WORD A1 A0 C1 C0 D11.................D0 MSB LSB FUNCTION 0 0 1 1 0 1 0 1 0 0 0 0 1 1 1 1 12-bit DAC data 12-bit DAC data 12-bit DAC data 12-bit DAC data Load input register A; DAC registers unchanged. Load input register B; DAC registers unchanged. Load input register C; DAC registers unchanged. Load input register D; DAC registers unchanged.
PAGE 11
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface MAX5253 CS COMMAND EXECUTED SCLK 1 DIN 8 A0 A1 C1 D11 D10 C0 9 D8 D9 D7 16 D6 D5 D4 D3 D2 D1 D0 D6 D5 D4 D3 D2 D1 D0 DATA PACKET (N) DOUT (MODE 0) A0 A1 C1 C0 D11 D10 D8 D9 D7 A1 MSB FROM PREVIOUS WRITE DATA PACKET (N) DATA PACKET (N-1) DOUT (MODE 1) A1 A0 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A1 MSB FROM PREVIOUS WRITE DATA PACKET (N) DATA PACKET (N-1) Figure 5.
PAGE 12
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface MAX5253 SCLK DIN DIN CS CS MAX5253 SCLK SCLK DOUT DIN MAX5253 SCLK DOUT CS DOUT DIN CS TO OTHER SERIAL DEVICES Figure 7. Daisy-Chaining MAX5253s DIN SCLK CS1 CS2 TO OTHER SERIAL DEVICES CS3 CS CS MAX5253 CS MAX5253 MAX5253 SCLK SCLK SCLK DIN DIN DIN Figure 8.
PAGE 13
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface Unipolar Output For a unipolar output, the output voltages and the reference inputs have the same polarity. Figure 9 shows the MAX5253 unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipolar output codes. For rail-to-rail outputs, see Figure 10. This circuit shows the MAX5253 with the output amplifiers configured with a closed-loop gain of +2.6 to provide 0V to 3.25V fullscale range when a 1.
PAGE 14
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface MAX5253 Using an AC Reference REFERENCE INPUTS In applications where the reference has AC signal components, the MAX5253 has multiplying capability within the reference input range specifications. Figure 12 shows a technique for applying a sine-wave signal to the reference input where the AC signal is offset before being applied to REFAB/REFCD. The reference voltage must never be more negative than DGND.
PAGE 15
+3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface VL TOP VIEW MAX5253 IOUT DAC_ OUT_ 2N3904 AGND 1 20 VDD FBA 2 19 FBD OUTA 3 18 OUTD FB_ OUTB 4 R FBB 5 17 OUTC MAX5253 15 REFCD REFAB 6 Figure 13.
PAGE 16
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface _Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX5253BC/D MAX5253AEPP MAX5253BEPP MAX5253AEAP MAX5253BEAP MAX5253BMJP 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C Dice* 20 Plastic DIP 20 Plastic DIP 20 SSOP 20 SSOP 20 CERDIP** ___________________Chip Information TRANSISTOR COUNT: 4337 INL (LSBs) ±1 ±1/2 ±1 ±1/2 ±1 ±2 * Dice are specified at TA = +25°C, DC parameters only.