Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) SOIC 24 W

_______________General Description

The MAX530 is a low-power, 12-bit, voltage-output digi-

tal-to-analog converter (DAC) that uses single +5V or

dual ±5V supplies. This device has an on-chip voltage

reference plus an output buffer amplifier. Operating cur-

rent is only 250µA from a single +5V supply, making it

ideal for portable and battery-powered applications. In

addition, the SSOP (Shrink-Small-Outline-Package) mea-

sures only 0.1 square inches, using less board area than

an 8-pin DIP. 12-bit resolution is achieved through laser

trimming of the DAC, op amp, and reference. No further

adjustments are necessary.

Internal gain-setting resistors can be used to define a

DAC output voltage range of 0V to +2.048V, 0V to

+4.096V, or ±2.048V. Four-quadrant multiplication is pos-

sible without the use of external resistors or op amps. The

parallel logic inputs are double buffered and are compati-

ble with 4-bit, 8-bit, and 16-bit microprocessors. For DACs

with similar features but with a serial data interface, refer

to the MAX531/MAX538/MAX539 data sheet.

________________________Applications

Battery-Powered Data-Conversion Products

Minimum Component-Count Analog Systems

Digital Offset/Gain Adjustment

Industrial Process Control

Arbitrary Function Generators

Automatic Test Equipment

Microprocessor-Controlled Calibration

____________________________Features

♦ Buffered Voltage Output

♦ Internal 2.048V Voltage Reference

♦ Operates from Single +5V or Dual ±5V Supplies

♦ Low Power Consumption:

250µA Operating Current

40µA Shutdown-Mode Current

♦ SSOP Package Saves Space

♦ Relative Accuracy: ±

LSB Max Over

Temperature

♦ Guaranteed Monotonic Over Temperature

♦ 4-Quadrant Multiplication with No External

Components

♦ Power-On Reset

♦ Double-Buffered Parallel Logic Inputs

______________Ordering Information

Ordering Information continued on last page.

* Dice are tested at T

= +25°C, DC parameters only.

MAX530

+5V, Low-Power, Parallel-Input,

Voltage-Output, 12-Bit DAC

________________________________________________________________

Maxim Integrated Products

D0/D8

ROFS

RFB

D3/D11

D2/D10

D1/D9

TOP VIEW

VOUT

REFOUT

REFGND

LDAC

CLR

AGND

REFIN

DGND

DIP/SO/SSOP

MAX530

__________________Pin Configuration

MAX530

REFOUT REFIN ROFS

2.048V

REFERENCE

POWER-ON

RESET

DAC LATCH

CONTROL

LOGIC

REFGND

AGND

CLR

LDAC

DGND

VOUT

RFB

NBL

INPUT

LATCH

D0/D8

D1/D9

D2/D10

D3/D11

NBM

INPUT

LATCH

NBH

INPUT

LATCH

24 1

234567

18 13 22

12-BIT DAC LATCH

________________Functional Diagram

Call toll free 1-800-998-8800 for free samples or literature.

PART TEMP. RANGE PIN-PACKAGE

MAX530ACNG 0°C to +70°C 24 Narrow Plastic DIP

MAX530BCNG 0°C to +70°C 24 Narrow Plastic DIP

MAX530ACWG 0°C to +70°C 24 Wide SO

MAX530BCWG 0°C to +70°C 24 Wide SO

MAX530ACAG 0°C to +70°C 24 SSOP

MAX530BCAG 0°C to +70°C 24 SSOP

MAX530BC/D 0°C to +70°C Dice* ±1

±1

ERROR

(LSB)

19-0168; Rev 3; 7/95

Summary of content (16 pages)

PAGE 1
9-0168; Rev 3; 7/95 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC ________________________Applications Battery-Powered Data-Conversion Products Minimum Component-Count Analog Systems Digital Offset/Gain Adjustment Industrial Process Control Arbitrary Function Generators Automatic Test Equipment Microprocessor-Controlled Calibration ________________Functional Diagram REFOUT 18 REFIN 13 ROFS 22 AGND 20 17 A0 A1 12-BIT DAC LATCH 8 9 CS 11 WR 10 LDAC MAX530 15 CONTROL LOGIC NBL INP
PAGE 2
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC ABSOLUTE MAXIMUM RATINGS VOUT to AGND (Note 1) .............................................. VSS, VDD Continuous Current, Any Input ........................................±20mA Continuous Power Dissipation (TA = +70°C) Narrow Plastic DIP (derate 13.33mW/°C above +70°C)......1067mW Wide SO (derate 11.76mW/°C above +70°C) .......... 941mW SSOP (derate 8.00mW/°C above +70°C) ..................640mW Operating Temperature Ranges: MAX530_C_ _ .
PAGE 3
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC (VDD = 5V ±10%, VSS = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT = 33µF, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX TA = +25°C 2.024 2.048 2.072 MAX530BC 2.017 2.079 MAX530BE 2.013 2.
PAGE 4
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies (VDD = 5V ±10%, VSS = -5V ±10%, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT = 33µF, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.
PAGE 5
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC MAX530 ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies (continued) (VDD = 5V ±10%, VSS = -5V ±10%, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT = 33µF, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.) Note 2: In single supply, INL and GE are calculated from code 11 to code 4095. Note 3: Zero Code, Bipolar and Gain Error PSRR are input referred specifications.
PAGE 6
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC MAX530 ____________________________Typical Operating Characteristics (continued) (TA = +25°C, single supply (+5V), unity gain, code = all 1s, unless otherwise noted).
PAGE 7
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC PIN NAME FUNCTION 1 D1/ D9 D1 Input Dta, when A0 = 0 and A1 = 1, or D9 Input when A0 = A1 = 1* 2 D2/ D10 D2 Input Dta, when A0 = 0 and A1 = 1, or D10 Input when A0 = A1 = 1* 3 D3/ D11 D3 Input Dta, when A0 = 0 and A1 = 1, or D11 (MSB) Input when A0 = A1 =1* 4 D4 D4 Input Dta, or tie to D0 and multiplex when A0 = 1 and A1 = 0* 5 D5 D5 Input Dta, or tie to D1 and multiplex when A0 = 1 and A1 = 0* 6 D6 D6 Input Dta, or tie to D2 and
PAGE 8
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC ________________Detailed Description The MAX530 consists of a parallel-input logic interface, a 12-bit R-2R ladder, a reference, and an op amp. The Functional Diagram shows the control lines and signal flow through the input data latch to the DAC latch, as well as the 2.048V reference and output op amp. Total supply current is typically 250µA with a single +5V supply.
PAGE 9
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC TOTAL REFERERNCE NOISE CS CREFOUT REFERENCE NOISE (µVRMS) 250 1.6 CREFOUT = 3.3µF 1.4 200 1.2 1.0 150 0.8 100 0.6 0.4 50 CREFOUT = 47µF 0 0.1 1 10 100 REFERENCE NOISE (mVp-p) 1.8 SINGLE POLE ROLLOFF MAX531-FIG02 TEK 7A22 300 0.2 0.0 1000 FREQUENCY (kHz) Figure 2. Reference Noise vs. Frequency Output Buffer The output amplifier uses a folded cascode input stage and a type AB output stage.
PAGE 10
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC REFOUT REFIN ROFS 33µF 2.048V REFERENCE RFB REFGND VOUT 2N7002 AGND DGND DAC POWER-ON RESET MAX530 VDD 12-BIT DAC LATCH CLR +5V VSS NBL INPUT LATCH A0 A1 CONTROL LOGIC NBM INPUT LATCH NBH INPUT LATCH CS WR LDAC D4 D6 D0/D8 D2/D10 D1/D9 D5 D7 D3/D11 Figure 3. Low-Current Shutdown Mode An additional 110µA of supply current can be saved when the internal reference is not used by connecting REFGND to VDD.
PAGE 11
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC MAX530 ADDRESS BUS VALID VIH A0-A1 VIL tAWH CS tCWS tCWH WR tAWS tWR tDS DATA BITS (8-BIT BYTE OR 4-BIT NIBBLE) CLR tDH VIH VIL DATA BUS VALID tCLR LDAC NOTE: TIMING MEASUREMENT REFERENCE LEVEL IS VIH + VIL 2 tLDAC Figure 4.
PAGE 12
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC D0-D3 DATA BUS D0-D3 D0-D3 FROM SYSTEM RESET D0-D3 CLR D4-D7 A0, A1 MC6800 D0-D7 DATA BUS D0-D7 FROM SYSTEM RESET CLR MAX530 MAX530 A0-A1 MC6809 CS LDAC WR D0-D7 02 CS LDAC WR E EN R/W ADDRESS BUS A0-A15 A0, A1 DECODER R/W EN A0-A15 ADDRESS BUS A13-A15 A0 DECODER A13-A15 Figure 7. 8-Bit and 16-Bit µP Interface Figure 5.
PAGE 13
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC MAX530 A0 = A1 = 0 NBL & NBM A0 = A1 = 1 NBH CS WR LDAC = 0 (DAC LATCH IS TRANSPARENT) DAC UPDATE Figure 8b. 8-Bit and 16-Bit µP Timing Sequence with LDAC = 0 Unipolar Configuration The MAX530 is configured for a 0V to +2.048V unipolar output range by connecting ROFS and RFB to VOUT (Figure 9). The converter operates from either single or dual supplies in this configuration. See Table 3 for the DAC-latch contents (input) vs.
PAGE 14
MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC Table 3.
PAGE 15
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC +5V VDD REFIN REFIN ROFS REFOUT MAX530 +5V REFIN ROFS REFGND 33µF MAX530 RFB AGND MAX530 RFB AGND DGND VOUT VOUT DGND VOUT VOUT REFGND VSS -5V Figure 11. Bipolar Configuration (-2.048V to +2.048V Output) __________Applications Information Single-Supply Linearity As with any amplifier, the MAX530’s output op amp offset can be positive or negative. When the offset is positive, it is easily accounted for.
PAGE 16
___________________Chip Topography D3/D11 D1/D9 POSITIVE OFFSET OUTPUT (LSBs) MAX530 +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC 4 3 2 1 0 D4 D2/D10 D0/D8 V DD RFB ROFS NEGATIVE OFFSET 1 2 3 4 5 6 7 VOUT 8 D5 0.133" (3.378mm) DAC CODE (LSBs) D6 V SS D7 Figure 13.