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MAX547

Octal, 13-Bit Voltage-Output DAC

with Parallel Interface

________________________________________________________________

Maxim Integrated Products

441234404142

22 2319

D11

VOUTD

REFCD

AGNDCD

AGNDEF

REFEF

VOUTE

VOUTF

D12

D10

VOUTH

REFGH

AGNDGH

GND

LDGH

LDEF

LDCD

LDAB

AGNDAB

REFAB

VOUTA

VOUTG

VOUTB

VOUTC

CLR

MAX547

PLCC

TOP VIEW

VOUTH

REFGH

AGNDGH

GND

VOUTG

LDEF

LDGH

VOUTA

REFAB

AGNDAB

LDAB

VOUTB

LDCD

VOUTD

AGNDEF

REFCD

AGNDCD

CLR

VOUTC

REFEF

VOUTF

VOUTE

D12

D11

D10

PLASTIC FP

MAX547

19-0257; Rev 3; 12/95

_________________General Description

The MAX547 contains eight 13-bit, voltage-output digital-to-

analog converters (DACs). On-chip precision output ampli-

fiers provide the voltage outputs. The MAX547 operates

from a ±5V supply. Bipolar output voltages with up to ±4.5V

voltage swing can be achieved with no external compo-

nents. The MAX547 has four separate reference inputs;

each is connected to two DACs, providing different full-

scale output voltages for every DAC pair.

The MAX547 features double-buffered interface logic with a

13-bit parallel data bus. Each DAC has an input latch and a

DAC latch. Data in the DAC latch sets the output voltage. The

eight input latches are addressed with three address lines.

Data is loaded to the input latch with a single write instruction.

An asynchronous load (

–

—

–

) input transfers data from the

input latch to the DAC latch. The four

–

—

–

inputs each control

two DACs, and all DAC latches can be updated simultane-

ously by asserting all

–

—

–

pins. An asynchronous clear (

–

—

–

)

input resets the output of all eight DACs to AGND_. Asserting

–

—

–

resets both the DAC and the input latch to bipolar zero

(1000hex). On power-up, reset circuitry performs the same

function as

–

—

–

. All logic inputs are TTL/CMOS compatible.

The MAX547 is available in 44-pin plastic quad flat pack

and 44-pin PLCC packages.

________________________Applications

Automatic Test Equipment

Minimum Component-Count Analog Systems

Digital Offset/Gain Adjustment

Arbitrary Function Generators

Industrial Process Controls

Avionics Equipment

_____________________________Features

♦ Full 13-Bit Performance without Adjustments

♦ 8 DACs in One Package

♦ Buffered Voltage Outputs

♦ Calibrated Linearity

♦ Guaranteed Monotonic to 13 Bits

♦ ±5V Supply Operation

♦ Unipolar or Bipolar Outputs Swing to ±4.5V

♦ Fast Output Settling (5µs to ±

⁄

LSB)

♦ Double-Buffered Digital Inputs

♦ Asynchronous Load Inputs Load Pairs of DAC Latches

♦ Asynchronous

–

—

–

Input Resets DACs to Analog

Ground

♦ Power-On Reset Circuit Resets DACs to Analog Ground

♦ Microprocessor and TTL/CMOS Compatible

________________Ordering Information

Ordering Information continued at end of data sheet.

*Contact factory for dice specifications.

MAX547ACQH

MAX547BCQH

MAX547ACMH 0°C to +70°C

0°C to +70°C

0°C to +70°C 44 PLCC

44 PLCC

44 Plastic FP

MAX547BCMH 0°C to +70°C 44 Plastic FP

MAX547BC/D 0°C to +70°C Dice*

_______________________________________________________________Pin Configurations

±2

±4

±2

±4

PART TEMP. RANGE

PIN-PACKAGE

INL

(LSBs)

Summary of content (16 pages)

PAGE 1
9-0257; Rev 3; 12/95 Octal, 13-Bit Voltage-Output DAC with Parallel Interface _____________________________Features The MAX547 contains eight 13-bit, voltage-output digital-toanalog converters (DACs). On-chip precision output amplifiers provide the voltage outputs. The MAX547 operates from a ±5V supply. Bipolar output voltages with up to ±4.5V voltage swing can be achieved with no external components.
PAGE 2
MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V VSS to GND...............................................................-6V to +0.3V Digital Input Voltage to GND ......................-0.3V to (VDD + 0.3V) REF_ ..........................................(AGND_ - 0.3V) to (VDD + 0.3V) AGND_ .............................................(VSS - 0.3V) to (VDD + 0.3V) VOUT_ .............
PAGE 3
Octal, 13-Bit Voltage-Output DAC with Parallel Interface (VDD = +5V, VSS = -5V, REF_ = 4.096V, AGND_ = GND = 0V, RL = 10kΩ, CL = 50pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Positive Supply Range VDD (Note 6) 4.75 5.25 V Negative Supply Range VSS (Note 6) -5.25 -4.
PAGE 4
__________________________________________Typical Operating Characteristics (VDD = 5V, VSS = -5V, REF_ = 4.096V, AGND_ = GND = 0V, TA = +25°C, unless otherwise noted.) 0.2 0.1 0 -0.1 -0.2 1 0 -0.3 20 15 5 0 -5 ISS -10 -15 -20 -2 1 TOTAL HARMONIC DISTORTION + NOISE AT DAC OUTPUT vs. REFERENCE FREQUENCY SETTLING TIME vs. LOAD CAPACITANCE REF– = 2Vp-p INPUT CODE = ALL 1s 0.060 0.050 0.040 0.080 0.070 REF– = 4Vp-p INPUT CODE = ALL 1s 0.060 0.050 0.040 0.030 0.030 0.020 0.020 0.010 0.
PAGE 5
Octal, 13-Bit Voltage-Output DAC with Parallel Interface POWER-SUPPLY REJECTION RATIO vs. FREQUENCY VDD = VSS = 5V ±200mV NO LOAD NEGATIVE FULL-SCALE 1.0 -30 VSS ERROR (LSB) PSRR (dB) -20 1.5 VDD -40 -50 MAX547-Fg TOC-8 -10 2.0 MAX547-Fg TOC-10 0 FULL-SCALE ERROR vs. LOAD RESISTANCE 0.5 0 REF_ = 4.096V -0.5 -60 -1.0 -70 -1.5 POSITIVE FULL-SCALE -2.0 -80 0.01 0.
PAGE 6
MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface ____________________________Typical Operating Characteristics (continued) (VDD = 5V, VSS = -5V, REF_ = 4.096V, AGND_ = GND = 0V, TA = +25°C, unless otherwise noted.) ADJACENT-CHANNEL CROSSTALK ADJACENT-CHANNEL CROSSTALK A: 5V/div A 5V/div B 5mV/div 500ns/div REF– = 4.096V, CL = 50pF, RL = 10kΩ A: DIGITAL INPUTS, DAC A, DATA BITS from ALL Os to OAAAhex B: OUTPUT, DAC B B: 5mV/div 500ns/div REF– = 4.
PAGE 7
Octal, 13-Bit Voltage-Output DAC with Parallel Interface PIN PLCC FLAT PACK NAME FUNCTION 16 10 A2 Address Bit 2 17 11 A1 Address Bit 1 18 12 A0 Address Bit 0 19–31 13–25 D12–D0 Data Bits 12–0 32 26 –———– LDEF Load Input (active low). Driving this asynchronous input low transfers the contents of input latches E and F to the respective DAC latches. 33 27 –———– LDGH Load Input (active low).
PAGE 8
MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface Reference and Analog-Ground Inputs The REF_ inputs can range between AGND_ and VDD. However, the DAC outputs will operate to VDD - 0.6V and VSS + 0.6V, due to the output amplifiers’ voltageswing limitations. The AGND_ inputs can be offset by any voltage within the supply rails. The offset-voltage potential must be lower than the reference-voltage potential.
PAGE 9
Octal, 13-Bit Voltage-Output DAC with Parallel Interface –——– CLR 1 –——– LD– 0 –—– WR 0 –—– CS 0 1 1 1 1 X Both latches latched 1 X 1 Both latches latched 1 X 0 0 Input latch transparent 1 X 1 X Input latch latched 1 X X 1 Input latch latched 1 0 X X DAC latch transparent 0 X X X All input and DAC latches at 1000hex, outputs at AGND– FUNCTION Both latches transparent __________Applications Information Multiplying Operation The MAX547 can be used for multiplying applica
PAGE 10
MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface Table 4. MAX547 Positive Unipolar Code Table Table 3.
PAGE 11
Octal, 13-Bit Voltage-Output DAC with Parallel Interface MAX547 Table 5.
PAGE 12
Octal, 13-Bit Voltage-Output DAC with Parallel Interface MAX547 _Ordering Information (continued) PART TEMP. RANGE MAX547AEQH MAX547BEQH MAX547AEMH MAX547BEMH -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PIN-PACKAGE REFAB REFCD 44 PLCC 44 PLCC 44 Plastic FP 44 Plastic FP MAX547 REFEF + REFGH - MAX494 Figure 6. Reference Buffering Power-Supply Bypassing and Ground Management For optimum performance, use a multilayer PC board with an unbroken analog ground.
PAGE 13
Octal, 13-Bit Voltage-Output DAC with Parallel Interface VDD REFAB 9, 37 REFCD 10 3 REFEF REFGH 43 36 8 INPUT LATCH A DAC LATCH A INPUT LATCH B DAC LATCH B DAC B INPUT LATCH C DAC LATCH C DAC C INPUT LATCH D DAC LATCH D DAC D INPUT LATCH E DAC LATCH E DAC E INPUT LATCH F DAC LATCH F DAC F INPUT LATCH G DAC LATCH G DAC G INPUT LATCH H DAC LATCH H DAC H DAC A 11 7 6 2 5 D12–D0 AGNDAB VOUTB VOUTC AGNDCD VOUTD DATA BUS 41 44 40 39 35 38 CS WR VOUTA 14 15 CONTRO
PAGE 14
VOUTF V SS VOUTE REFEF AGNDEF CLR AGNDCD REFCD VOUTD V SS VOUTC ____________________________________________________________Chip Topography VOUTB VOUTG VOUTA VOUTH V DD V DD REFGH REFAB AGNDAB AGNDGH 0.242" (6.147mm) LDAB GND LDCD LDGH CS LDEF WR D0 A2 D1 A1 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D2 A0 MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface 0.199" (5.
PAGE 15
Octal, 13-Bit Voltage-Output DAC with Parallel Interface DIM A2 C e D1 D B1 D2 B A A1 A2 A3 B B1 C D D1 D2 D3 e INCHES MAX MIN 0.180 0.165 0.110 0.100 0.156 0.145 – 0.020 0.021 0.013 0.032 0.026 0.011 0.009 0.695 0.685 0.655 0.650 0.630 0.590 0.500 REF 0.050 REF MILLIMETERS MIN MAX 4.19 4.57 2.54 2.79 3.68 3.96 0.51 – 0.33 0.53 0.66 0.81 0.23 0.28 17.40 17.65 16.51 16.64 14.99 16.00 12.70 REF 1.
PAGE 16
MAX547 Octal, 13-Bit Voltage-Output DAC with Parallel Interface Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.