Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) TQFN 16

General Description

The MAX5550 dual, 10-bit, digital-to-analog converter

(DAC) features high-output-current capability. The

MAX5550 sources up to 30mA per DAC, making it ideal

for PIN diode biasing applications. Outputs can also be

paralleled for high-current applications (up to 60mA

typ). Operating from a single +2.7V to +5.25V supply,

the MAX5550 typically consumes 1.5mA per DAC in

normal operation and less than 1µA (max) in shutdown

mode. The MAX5550 also features low output leakage

current in shutdown mode (±1µA max) that is essential

to ensure that the external PIN diodes are off.

Additional features include an integrated +1.25V

bandgap reference, and a control amplifier to ensure

high accuracy and low-noise performance. A separate

reference input (REFIN) allows for the use of an external

reference source, such as the MAX6126, for improved

gain accuracy. A pin-selectable I

C-/SPI™-compatible

serial interface provides optimum flexibility for the

MAX5550. The maximum programmable output current

value is set using software and an adjustment resistor.

The MAX5550 is available in a (3mm x 3mm) 16-pin thin

QFN package, and is specified over the extended

(-40°C to +85°C) temperature range.

Applications

PIN Diode Biasing

RF Attenuator Control

VCO Tuning

Features

♦ Pin-Selectable I

C- or SPI-Compatible Interface

♦ Guaranteed Low Output Leakage Current in

Shutdown (±1µA max)

♦ Guaranteed Monotonic over Extended

Temperature Range

♦ Dual Outputs for Balanced Systems

♦ Current Outputs Source Up to 30mA per DAC

♦ Parallelable Outputs for 60mA Applications

♦ Output Stable with RF Filters

♦ Internal or External Reference Capability

♦ Digital Output (DOUT) Available for Daisy

Chaining in SPI Mode

♦ +2.7V to +5.25V Single-Supply Operation

♦ 16-Pin (3mm x 3mm) Thin QFN Package

♦ Programmable Output Current Range Set by

Software and Adjustment Resistor

MAX5550

Dual, 10-Bit, Programmable, 30mA

High-Output-Current DAC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3871; Rev 2; 5/06

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART PIN-PACKAGE

PKG

CODE

TOP

MARK

M AX 5550E TE

16 Thi n Q FN - E P * T1633F-3 ACZ

SPI is a trademark of Motorola, Inc.

+1.25V

REF

REFIN

BUFFER

10-BIT CURRENT-STEERING

DAC A

OUTA

FSADJA

OUTB

FSADJB

GND

DOUT/A1

CS/A0

DIN/SDASCLK/SCL

SPI/I2C

16-BIT INPUT REGISTER

DAC REGISTER A

DAC REGISTER B

10-BIT CURRENT-STEERING

DAC B

MAX5550

Functional Diagram

Pin Configuration appears at end of data sheet.

*EP = Exposed paddle.

Note: Device is specified over the -40°C to +85°C operating

range.

Summary of content (15 pages)

PAGE 1
9-3871; Rev 2; 5/06 KIT ATION EVALU LE B A IL A AV Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC The MAX5550 dual, 10-bit, digital-to-analog converter (DAC) features high-output-current capability. The MAX5550 sources up to 30mA per DAC, making it ideal for PIN diode biasing applications. Outputs can also be paralleled for high-current applications (up to 60mA typ). Operating from a single +2.7V to +5.25V supply, the MAX5550 typically consumes 1.
PAGE 2
MAX5550 Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC ABSOLUTE MAXIMUM RATINGS VDD to GND .............................................................-0.3V to +6V OUTA, OUTB to GND .................................-0.3V to (VDD + 0.3V) REFIN, CS/AO, DOUT/AI, SPI/I2C, FSADJA, FSADJB to GND ......................................-0.3V to (VDD + 0.3V) SCLK/SCL, DIN/SDA ................................................-0.3V to +6V Continuous Power Dissipation (TA = +85°C) 16-Pin Thin QFN (derate 17.
PAGE 3
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC (VDD = +2.7V to +5.25V, GND = 0, VREFIN = +1.25V, internal reference, RFSADJ_ = 20kΩ; compliance voltage = (VDD - 0.6V), VSCLK/SCL = 0, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +3.0V and TA = +25°C.
PAGE 4
MAX5550 Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.25V, GND = 0, VREFIN = +1.25V, internal reference, RFSADJ_ = 20kΩ; compliance voltage = (VDD - 0.6V), VSCLK/SCL = 0, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +3.0V and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Bus Free Time Between a STOP and START Condition tBUF 1.
PAGE 5
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC DNL vs. CODE 3.0 0.25 2.5 0 INL (LSB) 0.50 0.5 0 2.0 -0.25 1.5 -1.0 -0.50 1.0 -1.5 -0.75 0.5 -2.0 -1.00 128 256 384 512 640 768 896 1024 CODE 0 0 128 256 384 512 640 768 896 1024 CODE MAXIMUM INL ERROR vs. OUTPUT CURRENT RANGES DNL vs. TEMPERATURE 2.5 0.30 2.0 INL (LSB) 0.25 0.20 0.15 1.5 1.0 0.10 60 85 4.0 0.5 0.05 10 35 TEMPERATURE (°C) 4.5 ZERO-SCALE CURRENT (nA) 0.35 -15 ZERO-SCALE OUTPUT CURRENT vs.
PAGE 6
Typical Operating Characteristics (continued) (VDD = +3.0V, GND = 0, VREFIN = +1.25V, internal reference, RFSADJ_ = 20kΩ, TA = +25°C. unless otherwise noted). SHUTDOWN CURRENT vs. SUPPLY VOLTAGE GLITCH IMPULSE MAX5548 toc10 MAX5550 toc11 620 SHUTDOWN CURRENT (nA) NO LOAD, CODE = 0x00 CS 1V/div VOUT_ AC-COUPLED 10mV/div 520 420 320 RLOAD = 65Ω CLOAD = 24pF 220 2.5 40ns/div 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE SHUTDOWN CURRENT vs.
PAGE 7
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE MAX5550 toc16 NO LOAD, CODE = 0x00 NO LOAD, CODE = 0x00 2.755 SUPPLY CURRENT (mA) 2.75 INTERNAL REFERENCE 2.70 VDD = 5V 2.750 2.745 VDD = 3V 2.740 2.65 2.735 EXTERNAL REFERENCE 2.730 2.60 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -40 -15 SUPPLY VOLTAGE (V) 10 35 60 85 TEMPERATURE (°C) WAKE-UP TIME IOUT vs.
PAGE 8
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC MAX5550 Pin Description PIN NAME 1 SCLK/SC Serial Clock Input. Connect SCL to VDD through a 2.4kΩ resistor in I2C mode. FUNCTION 2 DIN/SDA Serial Data Input. Connect SDA to VDD through a 2.4kΩ resistor in I2C mode. 3 CS/A0 Chip-Select Input in SPI Mode/Address Select 0 in I2C Mode. CS is an active-low input. Connect A0 to VDD or GND to set the device address in I2C mode. 4 SPI/I2C SPI/I2C Select Input.
PAGE 9
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC The MAX5550 is compatible with existing I2C systems (Figure 2). SCL and SDA are high-impedance inputs; SDA has an open-drain output that pulls the data line low during the ninth clock pulse. SDA and SCL require pullup resistors (2.4kΩ or greater) to V DD. Optional resistors (24Ω) in series with SDA and SCL protect the device inputs from high-voltage spikes on the bus lines. Series resistors also minimize crosstalk and undershoot of the bus signals.
PAGE 10
MAX5550 Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC S Sr P tRDA SDA tFDA tHD:DAT tSU:STA tSU:STO tHD:STA tSU:DAT SCL tFCL tRCL tFCL tHIGH tLOW tHIGH tLOW tRCL Figure 2. I2C Serial-Interface Timing Diagram Early STOP Conditions The MAX5550 recognizes a STOP condition at any point during transmission except if a STOP condition occurs in the same high pulse as a START condition (Figure 4). This condition is not allowed in the I2C format.
PAGE 11
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC MAX5550 S SDA ACKNOWLEDGE 1 SCL 2 8 9 Figure 5. Acknowledge Condition Table 3. Write Operation S T A R T Master SDA S ADDRESS BYTE COMMAND/DATA BYTE DATA BYTE S T O P D7 D6 D5 D4 D3 D2 D1 D0 P R/ W* 0 1 1 0 0 A1 A0 0 C5 C4 C3 A C K Slave SDA C2 C1 C0 D9 D8 A C K A C K *Read operation not supported.
PAGE 12
MAX5550 Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC tCSW CS tCSO tCSS tCP tCS1 tCSH SCLK tCH tDS tCL tDH LSB MSB DIN tCSE tDO1 DOUT tCSD MSB Figure 6. SPI-Interface Timing Diagram CS SCLK 1 DIN 2 C5 3 C4 4 C3 5 C2 C1 6 C0 7 8 9 10 11 12 13 14 15 16 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Figure 7.
PAGE 13
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC SERIAL DATA INPUT FUNCTIONS C5 C4 C3 C2 C1 C0 D9–D0 0 0 0 0 0 0 XXXXXXXXXX 0 0 0 0 0 1 10-bit DAC data Load DAC data to both DAC registers and both input registers from the shift register. 0 0 0 0 1 0 10-bit DAC data Load DAC register A and input register A from the shift register. 0 0 0 0 1 1 10-bit DAC data Load DAC register B and input register B from the shift register.
PAGE 14
MAX5550 Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC MAX5550 DIN(1) SCLK DOUT(1) CS FSADJB OUTB TOP VIEW FSADJA CONTROLLER DEVICE MAX5550 DIN(0) SCLK DOUT(0) CS OUTA Pin Configuration 12 11 10 9 N.C. 13 8 GND VDD 14 7 REFIN 6 N.C. 5 DOUT/A1 MAX5550 N.C. 15 3 4 SPI/I2C 2 CS/AO 1 DIN/SDA MAX5550 DIN(2) SCLK DOUT(2) CS SCLK/SCL GND 16 THIN QFN (3mm x 3mm) Figure 8.
PAGE 15
Dual, 10-Bit, Programmable, 30mA High-Output-Current DAC 12x16L QFN THIN.EPS (NE - 1) X e E MARKING E/2 D2/2 (ND - 1) X e AAAA D/2 e CL D D2 k CL b 0.10 M C A B E2/2 L E2 0.10 C C L 0.08 C C L A A2 A1 L L e e PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 PKG 8L 3x3 12L 3x3 16L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 b 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 D 2.90 3.00 3.