Datasheet

MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I
2
C Interface
13Maxim Integrated
Pin/Bump Description
Pin/Bump Configurations
PIN BUMP
NAME FUNCTION
TSSOP WLP
1 B1 REF Reference Voltage Input/Output
2 A1 OUTA Buffered Channel A DAC Output
3 A2 OUTB Buffered Channel B DAC Output
4 B2 GND Ground
5 A3 OUTC Buffered Channel C DAC Output
6 A4 OUTD Buffered Channel D DAC Output
7 B4 V
DD
Supply Voltage Input. Bypass V
DD
with a 0.1FF capacitor to GND.
8 — ADDR1 I
2
C Interface Address Selection Bit 1
9 C4 ADDR0 I
2
C Interface Address Selection Bit 0
10 C3 SCL I
2
C Interface Clock Input
11 C2 SDA I
2
C Bidirectional Serial Data
12 C1
CLR
Active-Low Clear Input
13 B3 V
DDIO
Digital Interface Power-Supply Input
14 —
LDAC
Load DAC. Active-low hardware load DAC input.
14
13
12
11
10
9
8
1
2
3
4
5
6
7
LDAC
V
DDIO
CLR
SDAGND
OUTB
OUTA
REF
TOP VIEW
MAX5813
MAX5814
MAX5815
SCL
ADDR0
ADDR1V
DD
OUTD
OUTC
TSSOP
+
WLP
TOP VIEW
ADDR0CLR
V
DD
REF
OUTDOUTA
MAX5815
+
1 2 34
A
SDA SCL
GND V
DDIO
OUTB OUTC
B
C