Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) uMAX 8

General Description

The MAX5821 is a dual, 10-bit voltage-output, digital-to-

analog converter (DAC) with an I

C-compatible,

2-wire interface that operates at clock rates up to 400kHz.

The device operates from a single 2.7V to 5.5V supply

115µA at V

= 3.6V. A power-down mode decreases

current consumption to less than 1µA. The MAX5821 fea-

tures three software-selectable power-down output

impedances: 100kΩ, 1kΩ, and high impedance. Other

features include internal precision rail-to-rail output

buffers and a power-on reset (POR) circuit that powers up

the DAC in the 100kΩ power-down mode.

The MAX5821 features a double-buffered I

C-compatible

serial interface that allows multiple devices to share a sin-

gle bus. All logic inputs are CMOS-logic compatible and

buffered with Schmitt triggers, allowing direct interfacing

to optocoupled and transformer-isolated interfaces. The

MAX5821 minimizes digital noise feedthrough by discon-

necting the clock (SCL) signal from the rest of the device

when an address mismatch is detected.

The MAX5821 is specified over the extended temperature

range of -40°C to +85°C and is available in a miniature 8-

pin µMAX

package. Refer to the MAX5822 data sheet

for the 12-bit version and the MAX5820 data sheet for the

8-bit version.

Applications

Digital Gain and Offset Adjustments

Programmable Voltage and Current Sources

Programmable Attenuation

VCO/Varactor Diode Control

Low-Cost Instrumentation

Battery-Operated Instrumentation

Features

♦ Ultra-Low Supply Current

115µA at V

= 3.6V

135µA at V

= 5.5V

♦ 300nA Low-Power Power-Down Mode

♦ Single 2.7V to 5.5V Supply Voltage

♦ Fast 400kHz I

C-Compatible 2-Wire

Serial Interface

♦ Schmitt-Trigger Inputs for Direct Interfacing

to Optocouplers

♦ Rail-to-Rail Output Buffer Amplifiers

♦ Three Software-Selectable Power-Down Output

Impedances

100kΩ, 1kΩ, and High Impedance

♦ Read-Back Mode for Bus and Data Checking

♦ Power-On Reset to Zero

♦ 8-Pin µMAX Package

MAX5821

Dual, 10-Bit, Low-Power, 2-Wire, Serial

Voltage-Output DAC

________________________________________________________________ Maxim Integrated Products 1

REF

SDASCL

OUTB

OUTAGND

ADD

μMAX

TOP VIEW

MAX5821

Pin Configuration

Ordering Information

μC

SDA

SCL

SDA

REF

SCL

OUTA

OUTB

OUTA

OUTB

MAX5821

Typical Operating Circuit

19-2316; Rev 1; 2/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART

TEMP

RANGE

PIN-

PACKAGE

ADDRESS

MAX5821LEUA

-40

C to +85

8 µMAX

0111 00X

MAX5821MEUA

-40

C to +85

8 µMAX

1011 00X

µMax is a registered trademark of Maxim Integrated Products, Inc.

Summary of content (13 pages)

PAGE 1
9-2316; Rev 1; 2/05 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC The MAX5821 is a dual, 10-bit voltage-output, digital-toanalog converter (DAC) with an I 2 C-compatible, 2-wire interface that operates at clock rates up to 400kHz. The device operates from a single 2.7V to 5.5V supply 115µA at VDD = 3.6V. A power-down mode decreases current consumption to less than 1µA. The MAX5821 features three software-selectable power-down output impedances: 100kΩ, 1kΩ, and high impedance.
PAGE 2
MAX5821 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC ABSOLUTE MAXIMUM RATINGS VDD, SCL, SDA to GND ............................................-0.3V to +6V OUT_, REF, ADD to GND..............................-0.3V to VDD + 0.3V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70°C) 8-Pin µMAX (derate 4.5mW above +70°C) ...................362mW Operating Temperature Range ...........................
PAGE 3
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC (VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL = 5kΩ, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX 0.05 ✕ VDD Input Hysteresis Input Leakage Current V ±0.1 Digital inputs = 0 or VDD Input Capacitance UNITS ±1 6 µA pF DIGITAL OUTPUT (SDA) Output Logic Low Voltage Three-State Leakage Current VOL IL ISINK = 3mA ±0.
PAGE 4
ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL = 5kΩ, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL STOP Condition Setup Time Cb Maximum Duration of Suppressed Pulse Widths tSP Note 1: Note 2: Note 3: Note 4: Note 5: CONDITIONS MIN tSU,STO Bus Capacitance TYP MAX UNITS 400 pF 50 ns 0.
PAGE 5
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC ZERO-CODE ERROR vs. TEMPERATURE 4 2 6 4 2 3.4 4.1 5.5 4.8 10 35 60 85 2.7 3.4 4.1 5.5 4.8 SUPPLY VOLTAGE (V) GAIN ERROR vs. TEMPERATURE DAC OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (NOTE 6) DAC OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT (NOTE 6) -0.8 -0.4 4 3 2 2.0 1 -15 10 35 60 1.5 CODE = 100 hex 1.0 0.5 CODE = 3FF hex NO LOAD 0 MAX5821 toc12 5 DAC OUTPUT VOLTAGE (V) -1.2 2.
PAGE 6
Typical Operating Characteristics (continued) (VDD = +5V, RL = 5kΩ, TA = +25°C.) POWER-DOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE POWER-UP GLITCH EXITING SHUTDOWN MAX5821 toc17 MAX5821 toc16 500 ZOUT = HIGH IMPEDANCE NO LOAD POWER-DOWN SUPPLY CURRENT (nA) MAX5821 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC 400 300 MAX5821 toc18 5V VDD TA = -40°C TA = +25°C 0 500mV/div OUT_ 200 10mV/div OUT_ 100 TA = +85°C CLOAD = 200pF CODE = 200 hex 0 2.7 3.4 4.1 5.5 4.
PAGE 7
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC PIN NAME FUNCTION 1 VDD Power Supply 2 GND Ground 3 ADD Address Select. A logic high sets the address LSB to 1; a logic low sets the address LSB to zero. 4 SCL Serial Clock Input 5 SDA Bidirectional Serial Data Interface 6 REF Reference Input 7 OUTA DAC A Output 8 OUTB DAC B Output Detailed Description The MAX5821 is a dual, 10-bit, voltage-output DAC with an I 2 C/SMBus™-compatible 2-wire interface.
PAGE 8
MAX5821 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC START and STOP Conditions When the serial interface is inactive, SDA and SCL idle high. A master device initiates communication by issuing a START condition. A START condition is a high-tolow transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA, while SCL is high (Figure 2). A START condition from the master signals the beginning of a transmission to the MAX5821.
PAGE 9
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC Sr P SCL SDA Figure 2. START and STOP Conditions SCL waits for a START condition followed by its slave address. The serial interface compares each address value bit-by-bit, allowing the interface to power down immediately if an incorrect address is detected. The LSB of the address word is the Read/Write (R/W) bit.
PAGE 10
MAX5821 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC MSB S LSB A6 A5 A4 A3 A2 A1 A0 R/W MSB D5 MSB ACK C3 LSB C2 C1 C0 D9 D8 D7 D6 ACK LSB D4 D3 D2 D1 D0 S1 S0 ACK P EXAMPLE-WRITE DATA SEQUENCE MSB S LSB A6 A5 A4 A3 A2 A1 A0 R/W MSB X MSB ACK C3 LSB C2 C1 C0 D9 D8 D7 D6 ACK LSB X X X B A PD1 PD0 ACK P EXAMPLE-WRITE TO POWER-DOWN REGISTER SEQUENCE Figure 6.
PAGE 11
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC MAX5821 Table 3. Command Byte Definitions SERIAL DATA INPUT FUNCTION C3 C2 C1 C0 D9 D8 D7 D6 0 0 0 0 DAC DATA DAC DATA DAC DATA DAC DATA Load DAC A input and DAC registers with new data. Contents of DAC B input registers are transferred to the DAC register. All outputs are updated. 0 0 0 1 DAC DATA DAC DATA DAC DATA DAC DATA Load DAC B input and DAC registers with new data.
PAGE 12
MAX5821 Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC S MSB LSB A6 R/W =0 A4 A5 A3 A2 A1 A0 MSB LSB C3 ACK C2 C1 C0 D9 D8 D7 D6 ACK DATA BYTES GENERATED BY MASTER DEVICE Sr MSB LSB A6 R/W =1 A4 A5 A3 A2 A1 A0 MSB ACK X DATA BYTES GENERATED BY MAX5821 MSB D5 LSB X PD1 PD0 D9 D8 D7 D6 ACK ACK GENERATED BY MASTER DEVICE LSB D4 D3 D2 D1 D0 S1 S0 ACK P Figure 8.
PAGE 13
Dual, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC 8 INCHES DIM A A1 A2 b E Ø0.50±0.1 H c D e E H 0.6±0.1 L 1 1 α 0.6±0.1 S BOTTOM VIEW D MIN 0.002 0.030 MAX 0.043 0.006 0.037 0.014 0.010 0.007 0.005 0.120 0.116 0.0256 BSC 0.120 0.116 0.198 0.188 0.026 0.016 6∞ 0∞ 0.0207 BSC 8LUMAXD.EPS 4X S 8 MILLIMETERS MAX MIN 0.05 0.75 1.10 0.15 0.95 0.25 0.36 0.13 0.18 2.95 3.05 0.65 BSC 2.95 3.05 4.78 5.03 0.41 0.66 0∞ 6∞ 0.