Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) uMAX 10

General Description

The MAX5841 is a quad, 10-bit voltage output, digital-

to-analog converter (DAC) with an I

C™-compatible,

2-wire interface that operates at clock rates up to

400kHz. The device operates from a single 2.7V to 5.5V

supply and draws only 230µA at V

= 3.6V. A power-

down mode decreases current consumption to less

than 1µA. The MAX5841 features three software-selec-

table power-down output impedances: 100kΩ , 1kΩ,

and high impedance. Other features include internal

precision Rail-to-Rail

output buffers and a power-on

reset (POR) circuit that powers up the DAC in the

100kΩ power-down mode.

The MAX5841 features a double-buffered I

C-compati-

ble serial interface that allows multiple devices to share

a single bus. All logic inputs are CMOS-logic compati-

ble and buffered with Schmitt triggers, allowing direct

interfacing to optocoupled and transformer-isolated

interfaces. The MAX5841 minimizes digital noise

feedthrough by disconnecting the clock (SCL) signal

from the rest of the device when an address mismatch

is detected.

The MAX5841 is specified over the extended tempera-

ture range of -40°C to +85°C and is available in a

miniature 10-pin µMAX package. Refer to the MAX5842

data sheet for the 12-bit version.

Applications

Digital Gain and Offset Adjustments

Programmable Voltage and Current Sources

Programmable Attenuation

VCO/Varactor Diode Control

Low-Cost Instrumentation

Battery-Powered Equipment

ATE

Features

♦ Ultra-Low Supply Current

230µA at V

= 3.6V

280µA at V

= 5.5V

♦ 300nA Low-Power Power-Down Mode

♦ Single 2.7V to 5.5V Supply Voltage

♦ Fast 400kHz I

C-Compatible 2-Wire Serial

Interface

♦ Schmitt-Trigger Inputs for Direct Interfacing to

Optocouplers

♦ Rail-to-Rail Output Buffer Amplifiers

♦ Three Software-Selectable Power-Down Output

Impedances

100kΩ, 1kΩ, and High Impedance

♦ Read-Back Mode for Bus and Data Checking

♦ Power-On Reset to Zero

♦ 10-Pin µMAX Package

MAX5841

Quad, 10-Bit, Low-Power, 2-Wire, Serial

Voltage-Output DAC

________________________________________________________________ Maxim Integrated Products 1

OUTD

OUTC

OUTB

OUTAGND

SCL

ADD

MAX5841

µMAX

TOP VIEW

REFSDA

Pin Configuration

Ordering Information

µC

SDA

SCL

SDA

REF

SCL

OUTA

OUTB

MAX5841

OUTC

OUTD

OUTB

OUTC

OUTD

OUTA

Typical Operating Circuit

19-1777; Rev 0; 1/02

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

PART

TEMP

RANGE

PIN-

PACKAGE

ADDRESS

MAX5841LEUB -40

C to +85

C 10 µMAX 0111 10X

MAX5841MEUB -40

C to +85

C 10 µMAX 1011 10X

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

C is a trademark of Philips Corp.

Summary of content (15 pages)

PAGE 1
9-1777; Rev 0; 1/02 Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC Applications Digital Gain and Offset Adjustments Features ♦ Ultra-Low Supply Current 230µA at VDD = 3.6V 280µA at VDD = 5.5V ♦ 300nA Low-Power Power-Down Mode ♦ Single 2.7V to 5.
PAGE 2
MAX5841 Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC ABSOLUTE MAXIMUM RATINGS VDD, SCL, SDA to GND ............................................-0.3V to +6V OUT_, REF, ADD to GND..............................-0.3V to VDD + 0.3V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 5.6mW above +70°C) ................444mW Operating Temperature Range ...........................
PAGE 3
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC (VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL = 5kΩ, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V, TA = 25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX ✕ 0.05 VDD Input Hysteresis Input Leakage Current V ±0.1 Digital inputs = 0 or VDD Input Capacitance UNITS ±1 6 µA pF DIGITAL OUTPUT (SDA) Output Logic Low Voltage Three-State Leakage Current VOL IL ISINK = 3mA ±0.
PAGE 4
ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL = 5kΩ, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V, TA = 25°C.) PARAMETER SYMBOL Bus Capacitance Cb Maximum Duration of Suppressed Pulse Widths tSP Note 1: Note 2: Note 3: Note 4: Note 5: CONDITIONS MIN TYP (Note 5) MAX UNITS 400 pF 50 ns 0 All devices are 100% production tested a at TA = +25°C and are guaranteed by design for TA = TMIN to TMAX.
PAGE 5
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC ZERO-CODE ERROR vs. TEMPERATURE 4 2 6 4 2 3.4 4.1 4.8 5.5 -15 10 35 60 85 2.7 3.4 4.1 SUPPLY VOLTAGE (V) GAIN ERROR vs. TEMPERATURE DAC OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (NOTE 6) DAC OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT (NOTE 6) -0.4 4 3 2 10 35 60 1.5 1.0 CODE = 100 hex CODE = 3FF hex NO LOAD -15 2.0 0.5 1 0 MAX5841 toc12 2.5 DAC OUTPUT VOLTAGE (V) 5 DAC OUTPUT VOLTAGE (V) -0.
PAGE 6
Typical Operating Characteristics (continued) (VDD = +5V, RL = 5kΩ, TA = +25°C.) POWER-DOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE POWER-UP GLITCH MAX5841 toc17 MAX5841 toc16 500 POWER-DOWN SUPPLY CURRENT (nA) MAX5841 Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC ZOUT = HIGH IMPEDANCE NO LOAD 400 300 5V VDD TA = -40°C TA = +25°C 0 200 10mV/div OUT_ 100 TA = +85°C 0 2.7 3.4 4.1 4.8 5.
PAGE 7
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC SETTLING TIME (NEGATIVE) DIGITAL FEEDTHROUGH MAX5841 toc23 MAX5841 toc22 SCL 2mV/div 500mV/div OUT_ OUT_ 2mV/div CLOAD = 200pF fSCL = 12kHz CODE = 000 hex CLOAD = 200pF CODE = 300 hex TO 100 hex 40µs/div 2µs/div CROSSTALK MAX5841 toc24 VOUTA 2V/div VOUTB 1mV/div 4µs/div Note 6: The ability to drive loads less than 5kΩ is not implied.
PAGE 8
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC MAX5841 Pin Description PIN NAME FUNCTION 1 ADD Address Select. A logic high sets the address LSB to 1; a logic low sets the address LSB to zero.
PAGE 9
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC POWER-DOWN COMMAND BITS MODE/FUNCTION PD1 PD0 0 0 Power-up device. DAC output restored to previous value. 0 1 Power-down mode 0. Power down device with output floating. 1 0 Power-down mode 1. Power down device with output terminated with 1kΩ to GND. 1 1 Power-down mode 2. Power down device with output terminated with 100kΩ to GND. by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition.
PAGE 10
MAX5841 Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC S Sr P SCL SDA SCL The MAX5841 has four different factory/user-programmed addresses (Table 2). Address bits A6 through A1 are preset, while A0 is controlled by ADD. Connecting ADD to GND sets A0 = 0. Connecting ADD to V DD sets A0 = 1. This feature allows up to four MAX5841s to share the same bus. SDA Table 2. MAX5841 I2C Slave Addresses Figure 2.
PAGE 11
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC S LSB A6 A5 A4 A3 A2 A1 A0 R/W MSB D5 MSB ACK C3 MAX5841 MSB LSB C2 C1 C0 D9 D8 D7 D6 ACK LSB D4 D3 D2 D1 D0 S1 S0 ACK P EXAMPLE WRITE DATA SEQUENCE MSB S LSB A6 A5 A4 A3 A2 A1 A0 R/W MSB X MSB ACK C3 LSB C2 C1 C0 D9 D8 D7 D6 ACK B A LSB X D C B A PD1 PD0 ACK P EXAMPLE WRITE TO POWER-DOWN REGISTER SEQUENCE Figure 6.
PAGE 12
MAX5841 Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC Table 3. Command Byte Definitions SERIAL DATA INPUT C0 D9 D8 D7 D6 0 DAC DATA DAC DATA DAC DATA DAC DATA Load DAC A input and DAC registers with new data. Contents of DAC B, C, and D input registers are transferred to the respective DAC registers. All outputs are updated. 0 1 DAC DATA DAC DATA DAC DATA DAC DATA Load DAC B input and DAC registers with new data.
PAGE 13
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC SERIAL DATA INPUT FUNCTION C3 C2 C1 C0 D9 D8 D7 D6 1 1 1 0 X X X X Update all DAC outputs simultaneously. Device ignores D9D6. Do not send the data byte. 1 1 1 1 0 0 0 0 Extended command mode. The next word writes to the powerdown registers (Extended Command Mode). 1 1 1 1 0 0 0 1 Read DAC A data. The device expects an Sr condition followed by an address word with R/W = 1. 1 1 1 1 0 0 1 0 Read DAC B data.
PAGE 14
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC MAX5841 Functional Diagram REF INPUT REGISTER A 10-BIT DAC A MUX AND DAC REGISTER MAX5841 OUTA RESISTOR NETWORK INPUT REGISTER B 10-BIT DAC B MUX AND DAC REGISTER OUTB RESISTOR NETWORK INPUT REGISTER C 10-BIT DAC C MUX AND DAC REGISTER OUTC RESISTOR NETWORK INPUT REGISTER D 10-BIT DAC D MUX AND DAC REGISTER OUTD RESISTOR NETWORK SERIAL INTERFACE SDA ADD SCL 14 POWER-DOWN CIRCUITRY VDD GND _____________________________________
PAGE 15
Quad, 10-Bit, Low-Power, 2-Wire, Serial Voltage-Output DAC 10LUMAX.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.