Datasheet

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General Description

The MAX6621 PECI-to-I

C translator provides an effi-

cient, low-cost solution for PECI-to-SMBus

C proto-

col conversion. The PECI-compliant host reads

temperature data directly from up to four PECI-enabled

CPUs. Interrupts are generated when the measured

temperature exceeds the high-temperature limit and

causes ALERT to assert. The RESET input allows the

host to reset the I

C bus in the event of a communica-

tion error.

The I

C interface provides an independent serial com-

munication channel to communicate synchronously with

peripheral devices in a multiple master or multiple slave

system. This interface allows a maximum serial-data

rate of 400kbps.

The MAX6621 is designed to operate from a +3.0V to

+3.6V supply voltage and ambient temperature range

of -20°C to +120°C.

Applications

Servers

Workstations

Desktop Computers

Features

♦ 400kbps I

C-Compatible, 2-Wire Serial Interface

♦ +3V to +3.6V Supply Voltage

♦ PECI-Compliant Port

♦ PECI-to-I

C Translation

♦ ALERT Output

♦ RESET Input (May Be Disabled as a Factory

Option)

♦ Programmable Temperature Offsets

♦ -20°C to +120°C Operating Temperature Range

♦ V

REF

Input Refers Logic Levels to the PECI

Supply Voltage

♦ Automatic I

C Bus Lockup Timeout Reset

♦ Lead-Free, 10-Pin µMAX

Package

Ordering Information

T = Tape and reel.

Denotes a lead(Pb)-free/RoHS-compliant package.

PART TEMP RANGE PIN-PACKAGE

MAX6621AUB+ -20°C to +120°C 10 μMAX

MAX6621AUB+T -20°C to +120°C 10 μMAX

19-0729; Rev 2; 12/09

MAX6621

PECI-to-I

C Translator

________________________________________________________________

Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

MASTER

SDA

SCL

SDA

SCL

PECI

+3.3V

CPU

GND

CPU

INTERNAL

TEMP

SENSOR

REF

AD0

ALERT

RESET

MAX6621

Typical Application Circuit

Pin Configuration appears at end of data sheet.

SMBus is a trademark of Intel Corp.

μMAX is a registered trademark of Maxim Integrated Products, Inc.

Summary of content (18 pages)

PAGE 1
9-0729; Rev 2; 12/09 PECI-to-I2C Translator Features ♦ 400kbps I2C-Compatible, 2-Wire Serial Interface The MAX6621 PECI-to-I2C translator provides an efficient, low-cost solution for PECI-to-SMBusTM/I2C proto- ♦ ♦ ♦ ♦ ♦ col conversion. The PECI-compliant host reads temperature data directly from up to four PECI-enabled CPUs. Interrupts are generated when the measured temperature exceeds the high-temperature limit and causes ALERT to assert.
PAGE 2
MAX6621 PECI-to-I2C Translator ABSOLUTE MAXIMUM RATINGS (All voltages with respect to GND.) VCC ..........................................................................-0.3V to +4V AD0, RESET, ALERT...................................-0.3V to (VCC + 0.3V) SCL, SDA .................................................................-0.3V to +6V VREF .........................................................................-0.3V to +4V PECI .........................................................-0.
PAGE 3
PECI-to-I2C Translator (Typical Application Circuit, VCC = +3V to +3.6V, VREF = +0.95V to +1.26V, TA = -20°C to +120°C, unless otherwise noted. Typical values are at VCC = +3.3V, VREF = +1.0V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN VH 0.1 x VREF Low-Level Sinking Current IIL 0.5 High-Level Sourcing Current IIH -6 Input Capacitance CI (Note 2) Signal-Noise Immunity Above 300MHz VN (Note 2) Hysteresis TYP MAX UNITS V 1.0 mA mA 10 0.
PAGE 4
MAX6621 PECI-to-I2C Translator TIMING CHARACTERISTICS (continued) (Typical Application Circuit, VCC = +3V to +3.6V, VREF = +0.95V to +1.26V, TA = -20°C to +120°C, unless otherwise noted. Typical values are at VCC = +3.3V, VREF = +1.0V, TA = +25°C.
PAGE 5
PECI-to-I2C Translator PIN NAME 1 PECI FUNCTION 2 AGND 3 AD0 I2C Bus Device Address Selection Input 4 SDA I2C Bus Data Input/Output 5 SCL I2C Bus Clock Input/Output 6 VCC Power Supply. Bypass to GND with a 0.1μF capacitor. 7 GND Power-Supply Ground 8 RESET I2C Reset Input. Pull RESET low to reset I2C interface and default all registers to startup values. Drive high for normal operation. 9 ALERT ALERT Interrupt Open-Drain Output.
PAGE 6
MAX6621 PECI-to-I2C Translator Detailed Description The MAX6621 obtains temperature data from an internal temperature sensor in PECI-compliant hosts. Up to four PECI hosts can be connected to the PECI I/O interface. The MAX6621 handles all the PECI transmissions ADDRESS and uses a 2-wire, I2C-compatible serial interface to communicate with the PECI host. Registers and Commands The following is an overview of the I2C/SMBus registers/commands supported by the MAX6621.
PAGE 7
PECI-to-I2C Translator Table 2.
PAGE 8
MAX6621 PECI-to-I2C Translator CONFIG2 The CONFIG2 register holds the offset that is added to all temperature return values that are not error codes. The offset is enabled in CONFIG0, bit 6; +95°C is set as 17C0h or 005Fh, depending on the data format. To represent +95°C in 16-bit representation, convert +95°C to binary using two’s complement and left-shift six times. The MAX6621 automatically converts the offset value to the equivalent value when the data format is changed.
PAGE 9
PECI-to-I2C Translator Temperature Averaging The MAX6621 can average several temperature readings and return a value as calculated by: TNEW = 1 1 ⎞ ⎛ x TOLD x TPECI + ⎜ 1 − ⎝ 2CONFIG3 2CONFIG3 ⎟⎠ where TOLD is the previously stored temperature, TPECI is the new value read from PECI, and TNEW is the newly stored temperature ready to be returned through I2C. This calculation can cause significant bits to be lost. Enable temperature averaging by writing the desired averaging amount to the CONFIG3 register.
PAGE 10
MAX6621 PECI-to-I2C Translator Temperature Commands Table 11 shows the different commands for selecting one of the PECI hosts or getting the maximum temperature. Read commands are initiated by the MAX6621, and the result returned is a 16-bit word with the least significant bit (LSB) clocked in first for the selected PECI host. The result consists of RESLO for the 8 LSBs and RESHI for the 8 MSBs, resulting in a 16-bit word. The 16-bit words are temperature values read from the PECI interface.
PAGE 11
PECI-to-I2C Translator Table 13. Read Maximum Temperature Address COMMAND DESCRIPTION 0Ah Read address of socket/domain with the maximum temperature TYPE MAX6621 data (with the exception of error codes) and the relative temperatures are listed for reference only. Table 12 shows the values with 16-bit and alternate word format. The read maximum temperature command from Table 11 returns the highest temperature that is not an error code from the enabled PECI sockets and domains.
PAGE 12
MAX6621 PECI-to-I2C Translator Error Codes Error codes are represented as 16-bit words in the 8000h–81FFh range as shown in Table 14. Table 15. Read/Write Temperature Alert Commands COMMAND Table 14. Error Codes ERROR CODES DESCRIPTION 8000h– 80FFh Refer to Intel PECI specification. 8100h PECI transaction failed for more than the configured number of consecutive retries. 8101h Polling disabled for requested socket/domain.
PAGE 13
PECI-to-I2C Translator The result is a 16-bit word (low byte transmitted first, high byte second), e.g., 0100h for the MAX6621 firmware version 1.0. RESET The MAX6621 operates as a slave that sends and receives data through an I2C-compatible, 2-wire interface. The interface uses a serial-data line (SDA) and a serial-clock line (SCL) to achieve bidirectional communication between master and slave.
PAGE 14
MAX6621 PECI-to-I2C Translator specified register. These write and read transmissions can be joined using a repeated START even though the MAX6621 7-bit slave address needs to be present preceding the R/W bits. Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high.
PAGE 15
PECI-to-I2C Translator possible as factory options, allowing multiple devices to be controlled independently from the same interface. Contact microcontroller technical support at https://support.maxim-ic.com/micro.
PAGE 16
MAX6621 PECI-to-I2C Translator Table 19. MAX6621 Slave Addresses A6:A1 A0 (SET BY AD0 PIN) SLAVE ADDRESS I2C ADDRESS BYTE INCLUDING R/W BIT 010101 0 2Ah 54h, 55h 010101 1 2Bh 56h, 57h Message Format for Writing to the MAX6621 A write to the MAX6621 consists of the transmission of the MAX6621’s slave address with the R/W bit set to zero, followed by at least 1 byte of information. The first byte of information is the command byte.
PAGE 17
PECI-to-I2C Translator Chip Information PROCESS: CMOS TOP VIEW Package Information PECI 1 AGND 2 + 10 VREF 9 ALERT AD0 3 8 RESET SDA 4 7 GND SCL 5 6 VCC MAX6621 For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PAGE 18
MAX6621 PECI-to-I2C Translator Revision History REVISION NUMBER REVISION DATE 0 1/07 1 9/07 DESCRIPTION Initial release. — Changed the ADDRESS INPUT A0/RST# heading in the Electrical Characteristics table to ADDRESS INPUT AD0/RST#. 2 Changed A0 to AD0 in the Block Diagram. 5 Replaced Figure 9 and some text in the Slave Address section. 2 12/09 PAGES CHANGED 14, 15 Replaced the text in the I2C Address Range section and replaced Table 19.