Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsPMICsPMIC - system monitor Dual voltage detector TQFN 20 EP

General Description

The MAX6884/MAX6885 EEPROM-configurable, multi-

voltage power-supply supervisors monitor six voltage-

detector inputs, one auxiliary input, and one watchdog

input, and feature three programmable outputs for highly

configurable power-supply monitoring applications.

Manual reset and margin disable inputs offer additional

flexibility.

Each voltage-detector input offers a programmable pri-

mary undervoltage and secondary undervoltage/over-

voltage threshold. Voltage-detector inputs IN1–IN6

monitor voltages from 1V to 5.8V in 20mV increments or

0.5V to 3.05V in 10mV increments.

Programmable outputs RESET, UV/OV, and WDO pro-

vide system resets/interrupts. Programmable output

options include open-drain or weak pullup. Program-

mable timing delay blocks configure each output to

wait between 25µs and 1600ms after their respective

assertion-causing conditions have been cleared. A fault

overvoltage, manual reset, etc.).

An internal 10-bit, 1% accurate ADC (MAX6884 only)

converts the voltages at IN1–IN6, AUXIN, and V

through a multiplexer that automatically sequences

through all inputs every 200ms. An SMBus™/I

C-com-

patible serial data interface programs and communi-

cates with the configuration EEPROM, configuration

registers, internal 512-bit user EEPROM, and reads the

ADC registers (MAX6884 only) and fault registers.

The MAX6884/MAX6885 are available in a 5mm x 5mm

x 0.8mm 20-pin thin QFN package and operate over

the extended temperature range (-40°C to +85°C).

Applications

Telecommunications/Central-Office Systems

Networking Systems

Servers/Workstations

Base Stations

Storage Equipment

Multimicroprocessor/Voltage Systems

Features

♦ 6 Configurable Input Voltage Detectors

Programmable Thresholds 0.5V to 3.05V

(in 10mV Increments) or 1V to 5.8V (in 20mV

Increments)

Primary UV and Secondary UV/OV Thresholds

♦ One Configurable Watchdog Timer from 6.25ms

to 102.4s

♦ Configurable RESET, UV/OV, and WDO Outputs

♦ Three Programmable Outputs

Open-Drain or Weak Pullup RESET, UV/OV,

and WDO

Active-Low Output Logic

Timing Delays from 25µs to 1600ms

♦ Margining Disable and Manual Reset Controls

♦ Internal 1.25V Reference or External Reference

Input

♦ 10-Bit Internal ADC Samples the Input Voltage

Detectors, V

and Auxiliary Input

♦ 512-Bit User EEPROM

Endurance: 100,000 Erase/Write Cycles

Data Retention: 10 Years

♦ SMBus/I

C-Compatible Serial

Configuration/Communication Interface

♦ ±1% Threshold Accuracy

MAX6884/MAX6885

EEPROM-Programmable, Hex

Power-Supply Supervisory Circuits

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

PART

TEMP RANGE

PIN-PACKAGE

PKG

CODE

MAX6884ETP

-40°C to +85°C

20 Thin QFN

T2055-5

MAX6885ETP

-40°C to +85°C

20 Thin QFN

T2055-5

Selector Guide

PART

VOLTAGE-

DETECTOR INPUTS

INTERNAL ADC

PROGRAMMABLE

OUTPUTS

REFERENCE INPUT

AUXILIARY INPUT

MAX6884ETP 6 Yes 3 Yes Yes

MAX6885ETP 6 No 3 No No

19-3594; Rev 0; 2/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Pin Configurations and Typical Operating Circuit appear at

end of data sheet.

EVALUATION KIT

AVAILABLE

Summary of content (34 pages)

PAGE 1
9-3594; Rev 0; 2/05 KIT ATION EVALU E L B A AVAIL EEPROM-Programmable, Hex Power-Supply Supervisory Circuits The MAX6884/MAX6885 EEPROM-configurable, multivoltage power-supply supervisors monitor six voltagedetector inputs, one auxiliary input, and one watchdog input, and feature three programmable outputs for highly configurable power-supply monitoring applications. Manual reset and margin disable inputs offer additional flexibility.
PAGE 2
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) IN1–IN6, VCC, RESET, UV/OV, WDO........................-0.3V to +6V WDI, MR, MARGIN, SDA, SCL, A0...........................-0.3V to +6V AUXIN, DBP, REFIN .................................................-0.3V to +3V Input/Output Current (all pins)..........................................±20mA Continuous Power Dissipation (TA = +70°C) 20-Pin (5mm x 5mm) Thin QFN (derate 21.
PAGE 3
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits (VIN1–VIN4 or VCC = 2.7V to 5.8V, AUXIN = WDI = GND, MARGIN = MR = DBP, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Threshold Hysteresis VTH-HYST 0.
PAGE 4
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (VIN1–VIN4 or VCC = 2.7V to 5.8V, AUXIN = WDI = GND, MARGIN = MR = DBP, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits (VIN1–VIN4 or VCC = 2.7V to 5.8V, AUXIN = WDI = GND, MARGIN = MR = DBP, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TIN1 = +25°C.) (Notes 1, 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 400 kHz TIMING CHARACTERISTICS (Figure 6) Serial Clock Frequency fSCL Clock Low Period tLOW 1.3 µs Clock High Period tHIGH 0.6 µs Bus Free Time tBUF 1.3 µs START Setup Time tSU:STA 0.
PAGE 6
Typical Operating Characteristics (VIN1–VIN4 or VCC = 5V, AUXIN = WDI = GND, MARGIN = MR = DBP. Typical values are at TA = +25°C, unless otherwise noted.) 0.90 0.85 TA = +25°C TA = -40°C 0.75 0.85 0.80 TA = +25°C TA = -40°C 3.6 4.6 MAX8664 toc03 1.015 1.010 1.005 1.000 0.995 0.990 0.985 0.980 0.70 2.6 2.6 5.6 3.6 4.6 -40 5.6 -15 10 35 60 SUPPLY VOLTAGE (V) TEMPERATURE (°C) IN_ TO RESET OR UV/OV PROPAGATION DELAY vs. TEMPERATURE NORMALIZED WATCHDOG TIMEOUT PERIOD vs.
PAGE 7
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits (VIN1–VIN4 or VCC = 5V, AUXIN = WDI = GND, MARGIN = MR = DBP. Typical values are at TA = +25°C, unless otherwise noted.) MR TO RESET OR UV/OV OUTPUT PROPAGATION DELAY vs. TEMPERATURE PROPAGATION DELAY (µs) 2.50 2.25 2.00 1.75 1.50 0.4 0.3 0.1 -0.3 -0.4 1.00 10 35 60 85 VAUXIN = 1V -0.2 -0.5 -15 VIN1 = 5V, 20mV/STEP RANGE 0 -0.1 1.25 -40 VIN5 = 2V, 10mV/STEP RANGE 0.2 MAX6884 toc11 2.75 ADC ACCURACY vs. TEMPERATURE 0.
PAGE 8
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits MAX6884/MAX6885 Pin Description (continued) PIN MAX6884 NAME FUNCTION Margin Input. MARGIN holds RESET, UV/OV, and WDO in their existing states when MARGIN is driven low. Leave MARGIN unconnected or connect to DBP if unused. MARGIN is internally pulled up to DBP through a 10µA current source. MARGIN overrides MR if both are asserted at the same time. 7 7 MARGIN 8 8 SDA Serial Data Input/Output (Open Drain).
PAGE 9
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits PIN MAX6884 18 19 MAX6885 18 19 NAME FUNCTION IN3 Voltage-Detector Input 3. Program two thresholds per voltage-detector input (undervoltage UV and undervoltage/overvoltage UV/OV). Program IN3 detector thresholds from 1V to 5.8V in 20mV increments, or 0.5V to 3.05V in 10mV increments. For improved noise immunity, bypass IN3 to GND with a 0.1µF capacitor installed as close to the device as possible.
PAGE 10
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits The MAX6884/MAX6885 feature a watchdog timer with programmable initial and normal timeout periods from 6.25ms to 102.4s. WDO asserts when WDI is not toggled from high-to-low or low-to-high within the appropriate watchdog timeout period. Program WDO to assert RESET. Program the MAX6884/MAX6885 to receive power through IN1–IN4 or V CC (see the Powering the MAX6884/MAX6885 section).
PAGE 11
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits OUTPUT STAGES MAX6884/MAX6885 LOGIC NETWORK FOR OUTPUTS COMPARATORS IN_ RESET UV/OV WDO MR MARGIN WATCHDOG TIMER (ADC MUX) (ADC) WDI, RESET (ADC REGISTERS) AUXIN, VCC SDA, SCL SERIAL INTERFACE REGISTER BANK EEPROM (USER AND CONFIG) A0 BOOT CONTROLLER ANALOG BLOCK DIGITAL BLOCK MAX6884 MAX6885 ( ) MAX6884 ONLY Figure 1.
PAGE 12
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits MR MARGIN WDI MAX6884/MAX6885 Functional Diagram 2.55V LDO IN_ DETECTOR IN1 RESET OUTPUT WEAK PULLUP OR OPEN-DRAIN SWITCH 10kΩ IN2 DETECTOR IN3 IN3 DETECTOR IN4 IN4 DETECTOR IN5 IN5 DETECTOR IN6 IN6 DETECTOR PROGRAMMABLE ARRAY IN2 RESET RESET TIMING BLOCK UV/OV TIMING BLOCK UV/OV OUTPUT UV/OV WATCHDOG TIMING BLOCK WDO OUTPUT WDO MAIN OSCILLATOR REFIN (N.C.) AUXIN (N.C.
PAGE 13
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits ADC (MAX6884 Only) An internal 10-bit ADC (MAX6884 only) converts voltages at IN1–IN4, AUXIN, and VCC through a multiplexer that automatically sequences through all inputs every 200ms. Registers 18h to 27h store the ADC data (see Table 3). Read the ADC data from the MAX6884 with the serial interface. The ADC has no effect on programmable outputs RESET, UV/OV, or WDO.
PAGE 14
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Table 3.
PAGE 15
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits REGISTER ADDRESS EEPROM MEMORY ADDRESS BIT RANGE 00h 80h [7:0] IN1 Primary Undervoltage Detector Threshold (see equations in the IN1–IN6 section) 01h 81h [7:0] IN2 Primary Undervoltage Detector Threshold 02h 82h [7:0] IN3 Primary Undervoltage Detector Threshold 03h 83h [7:0] IN4 Primary Undervoltage Detector Threshold 04h 84h [7:0] IN5 Primary Undervoltage Detector Threshold 05h 85h [7:0] IN6 Primary Undervoltage Detector T
PAGE 16
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits External Voltage-Divider To achieve thresholds from 0.1667V to 1.0167V in 3.3mV increments, program the respective input voltage detector for high impedance and use an external voltage-divider (see Figure 2). Set voltage-detector inputs for high impedance by programming bits R10h[5:0]. Design the resistor voltage-divider to scale the input voltage to between 0.1667V and 1.0167V at the input of the device.
PAGE 17
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits RESET Program RESET to depend on MR, UV/OV, WDO, or any programmable primary voltage-detector input (see Table 6). As an example, RESET may depend on the IN3 primary undervoltage threshold, MR, UV/OV, and WDO. Write 1’s to R11h[1:0], R11h[4], and R12h[7] to configure as indicated. IN3 must be above the undervoltage threshold, MR must be high, UV/OV must be deasserted, and WDO must be deasserted to be a logic “1,” then RESET deasserts.
PAGE 18
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Table 6.
PAGE 19
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits then UV/OV deasserts. The logic state of UV/OV, in this example, is equivalent to the logical statement: IN1 · MR · RESET UV/OV remains low for its programmed time delay (tUP) after all assertion-causing conditions are removed. Program time delays for UV/OV from 25µs to 1600ms (see Table 7). Configure UV/OV for open drain or weak pullup through bit R14h[0]. Table 7.
PAGE 20
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits WDO The MAX6884/MAX6885 offer a separate output for the watchdog timer system. WDO is active low and programmable for open-drain or weak pullup. Program WDO to assert RESET when the watchdog timer expires. See the Configuring the Watchdog Timer section for a complete description of the watchdog timer system. if it stalls. The output of the watchdog timer (WDO) connects to the reset input or a nonmaskable interrupt of the µP.
PAGE 21
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits than 5µs; see Figure 4). If WDO is not programmed to depend on RESET and the watchdog timer expires, WDO will remain asserted until a low-to-high or high-tolow edge occurs on WDI. Program WDO for open-drain or weak pullup (see Table 8). Fault Register Registers 28h to 2Ah store all fault conditions including undervoltage, overvoltage, and watchdog timer faults (see Table 9). Fault registers are read-only and lose contents upon power removal.
PAGE 22
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Table 9.
PAGE 23
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits REGISTER ADDRESS 16h EEPROM MEMORY ADDRESS BIT RANGE DESCRIPTION [1] 1 = User EEPROM Writes Disabled on RESET Assertion 0 = User EEPROM Writes Enabled on RESET Assertion [0] 1 = User EEPROM Writes Disabled on UV/OV Assertion 0 = User EEPROM Writes Enabled on UV/OV Assertion 96h Configuration Register Bank and EEPROM The configuration registers can be directly modified by the serial interface without modifying the EEPROM after the power-up
PAGE 24
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Table 12.
PAGE 25
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits REGISTER ADDRESS EEPROM MEMORY ADDRESS READ/ WRITE 25h — R ADC Conversion Data for AUXIN (2 LSBs) (Table 3) 26h — R ADC Conversion Data for VCC (8 MSBs) (Table 3) 27h — R ADC Conversion Data for VCC (2 LSBs) (Table 3) 28h — R Fault Flags for Primary Voltage Detectors (Table 9) 29h — R Fault Flags for Secondary Voltage Detectors (Table 9) 2Ah — R Fault Flags for RESET, UV/OV, and WDO (Table 9) 00h REGISTER BANK 80h CONFI
PAGE 26
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits SMBus/I2C-Compatible Serial Interface The MAX6884/MAX6885 feature an I2C/SMBus-compatible 2-wire serial interface consisting of a serial data line (SDA) and a serial clock line (SCL). SDA and SCL facilitate bidirectional communication between the MAX6884/MAX6885 and the master device at clock rates up to 400kHz. Figure 6 shows the 2-wire interface timing diagram.
PAGE 27
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Acknowledge The acknowledge bit (ACK) is the 9th bit attached to any 8-bit data word. The receiving device always generates an ACK. The MAX6884/MAX6885 generate an ACK when receiving an address or data by pulling SDA low during the 9th clock period (see Figure 9). When transmitting data, such as when the master device reads data back from the MAX6884/MAX6885, the MAX6884/ MAX6885 wait for the master device to generate an ACK.
PAGE 28
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits SA7 through SA4 represent the standard 2-wire interface address (1010); for devices with EEPROM, SA2 corresponds to the A0 address inputs of the MAX6884/ MAX6885 (hardwired as logic-low or logic-high). SA0 is a read/write flag bit (0 = write, 1 = read). The A0 address input allows up to two MAX6884/ MAX6885s to connect to one bus. Connect A0 to GND or to the 2-wire serial-interface power supply (see Figure 10).
PAGE 29
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits 5) The active slave asserts an ACK on the data line. 6) The master sends a repeated start condition. 7) The master sends the 7-bit slave ID plus a read bit (high). 8) The addressed slave asserts an ACK on the data line. 9) The slave sends 8 data bits. 10) The master asserts a NACK on the data line. 11) The master generates a STOP condition. 3) The addressed slave asserts an ACK on the data line. 4) The master sends 8 data bits.
PAGE 30
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Note that once the read has been done, the internal pointer is increased by one, unless a memory boundary is hit. If the device is busy or if the address is not an allowed one, the command code is NACKed and the internal address pointer is not altered. The master must then interrupt the communication issuing a STOP condition.
PAGE 31
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Configuration Latency Period A delay of less than 5µs occurs between writing to the configuration registers and the time when these changes actually take place, except when changing one of the voltage-detector thresholds. Changing a voltage-detector threshold typically takes 150µs. When changing EEPROM contents, a software reboot or cycling of power is required for these changes to transfer to volatile memory.
PAGE 32
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits MAX6884/MAX6885 Pin Configurations IN1 IN2 IN3 IN4 IN5 IN1 IN2 IN3 IN4 IN5 TOP VIEW 20 19 18 17 16 20 19 18 17 16 RESET 1 15 IN6 RESET 1 15 IN6 WDO 2 14 DBP WDO 2 14 DBP UV/OV 3 13 VCC UV/OV 3 13 VCC GND 4 12 AUXIN GND 4 12 N.C. WDI 5 11 REFIN WDI 5 11 N.C. SCL A0 6 THIN QFN *EXPOSED PAD CONNECTED TO GND.
PAGE 33
EEPROM-Programmable, Hex Power-Supply Supervisory Circuits QFN THIN.EPS D2 D MARKING b C L 0.10 M C A B D2/2 D/2 k L XXXXX E/2 E2/2 C L (NE-1) X e E DETAIL A PIN # 1 I.D. E2 PIN # 1 I.D. 0.35x45∞ e (ND-1) X e DETAIL B e L1 L C L C L L L e e 0.10 C A C 0.08 C A1 A3 PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.
PAGE 34
MAX6884/MAX6885 EEPROM-Programmable, Hex Power-Supply Supervisory Circuits Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) COMMON DIMENSIONS EXPOSED PAD VARIATIONS PKG. 16L 5x5 20L 5x5 28L 5x5 32L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A A1 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.