Datasheet
MAX7032
Low-Cost, Crystal-Based, Programmable,
ASK/FSK Transceiver with Fractional-N PLL
28 ______________________________________________________________________________________
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of PCB trace adds about 20nH of
parasitic inductance. The parasitic inductance can
have a dramatic effect on the effective inductance of a
passive component. For example, a 0.5in trace con-
necting to a 100nH inductor adds an extra 10nH of
inductance, or 10%.
To reduce parasitic inductance, use wider traces and a
solid ground or power plane below the signal traces.
Also, use low-inductance connections to the ground
plane and place decoupling capacitors as close as
possible to all V
DD
pins and HVIN.
1
2
3
4
5
6
7
8
C8
L3
C6
910
11
C10
C12
C9
12
L5
C11
13
IN OUTGND
14
15
16
Y2
C13
17
18
19
20
21
22
23
24
C17
R1
25262728293032 31
CLOCK
OUTPUT
DIO
SCLK
MAX7032
3.0V
C23
V
DD
V
DD
PAVDD
ROUT
TX/RX1
TX/RX2
PAOUT
AVDD
LNAIN
LNASRC
LNAOUT
MIXIN+
MIXIN-
IFIN+
IFIN-
PDMIN
PDMAX
MIXOUT
DS-
DS+
OP+
DF
RSSI
T/R
ENABLE
DATA
CLKOUT
DVDD
HVIN
CS
DIO
SCLK
XTAL1
XTAL2
CS
C20
C21
Y1
L4
C14
C15
DATA
ENABLE
C16
TRANSMIT/
RECEIVE
C22
C5
C4
C18
C19
C7
L1
L2
C1C2
R2
R3*
*OPTIONAL POWER-ADJUST RESISTOR
C24
EXPOSED
PAD
C3
L6
V
DD
V
DD
V
DD
Typical Application Circuit