Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsLinear ICsMAX7042ATJ+

General Description

The MAX7042 fully integrated, low-power, CMOS

superheterodyne RF receiver is designed to receive

frequency-shift-keyed (FSK) data at rates up to 66kbps

nonreturn-to-zero (NRZ) (33kbps Manchester). The

MAX7042 requires only a few external components to

realize a complete wireless RF receiver at 308, 315,

418, and 433.92MHz.

The MAX7042 includes all the active components

required in a superheterodyne receiver including a low-

noise amplifier (LNA), an image-rejection (IR) mixer, a

fully integrated phase-locked loop (PLL), local oscillator

(LO), 10.7MHz IF limiting amplifier with received-signal-

strength indicator (RSSI), low-noise FM demodulator,

and a 3V regulator. Differential peak-detecting data

demodulators are included for baseband data recovery.

The MAX7042 is available in a 32-pin TQFN and is

specified over the automotive -40°C to +125°C tem-

perature range.

Applications

Remote Keyless Entry

Tire-Pressure Monitoring

Home and Office Lighting Control

Remote Sensing

Smoke Alarms

Home Automation

Local Telemetry Systems

Security Systems

Features

o +2.4V to +3.6V or +4.5V to +5.5V Single-Supply

Operation

o Four User-Selectable Carrier Frequencies

308, 315, 418, and 433.92MHz

o -110dBm RF Input Sensitivity at 315MHz

o -109dBm RF Input Sensitivity at 433.92MHz

o Fast Startup (< 250µs)

o Small 32-Pin TQFN Package

o Low Operating Supply Current

6.2mA Continuous

20nA Power-Down

o Integrated PLL, VCO, and Loop Filter

o 45dB Integrated Image Rejection

o Selectable IF BW with External Filter

o Positive and Negative Peak Detectors

o RSSI Output

MAX7042

308MHz/315MHz/418MHz/433.92MHz

Low-Power, FSK Superheterodyne Receiver

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Maxim Integrated Products

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MAX7042

TQFN

TOP VIEW

N.C.

FSEL1

FSEL2

HVIN

DATA

LNASEL

N.C.

RSSI

XTAL2

XTAL1

AVDD

LNAIN

DVDD

DGND

OP+

DS+

DS-

PDMAX

PDMIN

IFIN+

IFIN-

AGND

MIXOUT

MIXIN-

MIXIN+

LNAOUT

LNASRC

Pin Configuration

Ordering Information

19-3704; Rev 2; 1/12

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Denotes a lead(Pb)-free/RoHS-compliant package.

EP = Exposed pad.

EVALUATION KIT

AVAILABLE

PART TEMP RANGE PIN-PACKAGE

MAX7042ATJ+ -40°C TO +125°C 32 TQFN-EP*

Typical Application Circuit appears at end of data sheet.

Summary of content (17 pages)

PAGE 1
9-3704; Rev 2; 1/12 KIT ATION EVALU E L B A AVAIL 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver Features The MAX7042 fully integrated, low-power, CMOS superheterodyne RF receiver is designed to receive frequency-shift-keyed (FSK) data at rates up to 66kbps nonreturn-to-zero (NRZ) (33kbps Manchester). The MAX7042 requires only a few external components to realize a complete wireless RF receiver at 308, 315, 418, and 433.92MHz. o +2.4V to +3.6V or +4.5V to +5.
PAGE 2
MAX7042 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver ABSOLUTE MAXIMUM RATINGS HVIN to AGND or DGND .......................................-0.3V to +6.0V AVDD, DVDD to AGND or DGND..........................-0.3V to +4.0V FSEL1, FSEL2, LNASEL, EN, DATA...............................(DGND - 0.3V) to (HVIN + 0.3V) All Other Pins............................(AGND - 0.3V) to (AVDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 32-Pin TQFN (derate 34.5mW/°C above +70°C)..........
PAGE 3
08MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver (Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VHVIN = +2.4V to +3.6V, fRF = 308, 315, 418, and 433.92MHz; T A = -40°C to +125°C, unless otherwise noted. Typical values are at V AVDD = V DVDD = V HVIN = +3.0V, fRF = 433.92MHz, PRFIN ≤ -80dBm, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL Input High Pulldown Current IIH Input Low-Leakage Current IIL TYP MAX VHVIN = +3.6V CONDITIONS 8 15 VHVIN = +5.
PAGE 4
AC ELECTRICAL CHARACTERISTICS (continued) (Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VHVIN = +2.4V to +3.6V, fRF = 308, 315, 418, and 433.92MHz; T A = -40°C to +125°C, unless otherwise noted. Typical values are at V AVDD = V DVDD = V HVIN = +3.0V, fRF = 433.92MHz, PRFIN ≤ -80dBm, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL Operating Frequency CONDITIONS MIN TYP fIF MAX UNITS 10.7 RSSI Slope MHz 10 16 21 mV/dB 1.1 2.1 3.
PAGE 5
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver 6.9 +25°C 6.7 6.5 6.1 MAX7042 toc05 VDD = +3.6V 400 VDD = +3.0V 325 350 375 400 425 450 10 1 0.2% BER 0.1 VDD = +2.4V fRF = 315MHz 0.01 0 300 -40 -15 10 35 60 85 -114 110 -112 -110 -106 -108 -104 RF FREQUENCY (MHz) TEMPERATURE (°C) AVERAGE INPUT POWER (dBm) BIT-ERROR RATE vs. AVERAGE INPUT POWER (2x ILNA) SENSITIVITY vs. TEMPERATURE (1x ILNA) SENSITIVITY vs.
PAGE 6
Typical Operating Characteristics (continued) (Typical Application Circuit, VDD = 3.0V, fRF = 433.92MHz, IF BW = 280kHz, data rate = 4kbps Manchester encoded, frequency deviation = ±50kHz, BER = 0.2%, TA = +25°C, unless otherwise noted.) SYSTEM GAIN vs. IF FREQUENCY (2x ILNA) 50 45dB IMAGE REJECTION 10 SYSTEM GAIN (dB) FROM RFIN TO MIXOUT fRF = 433.92MHz 30 20 UPPER SIDEBAND LOWER SIDEBAND 40 FROM RFIN TO MIXOUT fRF = 433.
PAGE 7
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION S11 SMITH PLOT OF RFIN MAX7042 toc20 MAX7042 toc19 70 -150 433.92MHz 60 -160 50 -170 40 -180 REAL IMPEDANCE 30 IMAGINARY IMPEDANCE (Ω) REAL IMPEDANCE (Ω) fRF = 315MHz -190 IMAGINARY IMPEDANCE 20 -200 10 1 100 INDUCTIVE DEGENERATION (nH) PHASE NOISE vs. OFFSET FREQUENCY INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION 90 fRF = 433.
PAGE 8
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver MAX7042 Pin Description 8 PIN NAME 1, 2 N.C. No Connection. Internally pulled down. FUNCTION 3, 25, 32 N.C. No Connection. Not internally connected. 4 RSSI Buffered Received-Signal-Strength-Indicator Output 5 XTAL2 6 XTAL1 Crystal Input 1. Bypass to GND if XTAL2 is driven by an AC-coupled external reference. 7 AVDD Analog Power-Supply Voltage. AVDD is connected to an on-chip +3.0V regulator in +5V operation.
PAGE 9
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver LNAOUT MIXIN+ MIXIN- 10 11 12 MIXOUT IFIN- 13 IFIN+ 15 16 IMAGE REJECTION LNAIN 8 LNASRC 9 LNA 0˚ Σ 90˚ XTAL2 6 CRYSTAL OSCILLATOR AGND 14 XTAL1 IF LIMITING AMPS DIVIDEBY-32 RSSI 4 RSSI VCO FSK FSK DEMODULATOR 5 PHASE DETECTOR 27 FSEL1 RDF1 100kΩ LOOP FILTER EN 26 RDF2 100kΩ DVDD 24 EXPOSED PAD* MAX7042 FSK DATA FILTER DGND 23 HVIN 29 AVDD 7 28 FSEL2 31 LNASEL 3.0V REG 3.
PAGE 10
MAX7042 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver Detailed Description The MAX7042 CMOS superheterodyne receiver and a few external components provide a complete FSK receive chain from the antenna to the digital output data. FSK uses the difference in frequency of the carrier to represent a logic 0 and logic 1. Depending on signal power and component selection, data rates as high as 66kbps NRZ can be achieved.
PAGE 11
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver MAX7042 TO FSK BASEBAND FILTER AND DATA SLICER IF LIMITING AMPS PHASE DETECTOR CHARGE PUMP LOOP FILTER 10.7MHz VCO 2.1mV/kHz Figure 1. FSK Demodulator PLL Block Diagram Mixer Intermediate Frequency (IF) A unique feature of the MAX7042 is the integrated image rejection of the mixer. This device is designed to eliminate the need for a costly front-end SAW filter in many applications.
PAGE 12
MAX7042 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver Crystal Oscillator Frequency Tolerance The XTAL oscillator in the MAX7042 is used to generate the LO for mixing with the received signal. The XTAL oscillator frequency sets the received signal frequency as: fRECEIVE = (fXTAL x 32) + 10.7MHz The received image frequency at: fIMAGE = (fXTAL x 32) - 10.
PAGE 13
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver b a(100kΩ)(π)(fC) a CF2 = 4(100kΩ)(π)(fC) CF1 = Table 2. Coefficients to Calculate CF1 and CF2 FILTER TYPE a b Butterworth (Q = 0.707) 1.414 1.000 Bessel (Q = 0.577) 1.3617 0.618 MAX7042 FSK DEMOD 100kΩ DS+ DF OP+ CF2 100kΩ CF1 Figure 2. Sallen-Key Lowpass Data Filter where fC is the desired 3dB corner frequency. For example, choose a Butterworth filter response with a 5kHz corner frequency: 1.000 ≈ 450pF (1.
PAGE 14
MAX7042 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver Numerous configurations can be used to generate the data-slicer threshold. For example, the circuit in Figure 3 shows a simple method using only one resistor and one capacitor. This configuration averages the analog output of the filter and sets the threshold to approximately 50% of that amplitude.
PAGE 15
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver of parasitic inductance. The parasitic inductance can have a dramatic effect on the effective inductance of a passive component. For example, a 0.5in trace connecting a 100nH inductor adds an extra 10nH of inductance or 10%. To reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces.
PAGE 16
MAX7042 308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver Table 3. Component Values for Typical Application Circuit COMPONENT VALUE FOR 315MHz RF VALUE FOR 433.92MHz RF DESCRIPTION C1 0.01µF 0.01µF 5% C2 220pF 220pF 5% C3 220pF 220pF 5% C4 470pF 470pF 5% C5 0.047µF 0.047µF 10% C6 0.1µF 0.1µF 10% C7 100pF 100pF 10% C8 100pF 100pF 10% C9 1.2pF Open ±0.
PAGE 17
308MHz/315MHz/418MHz/433.92MHz Low-Power, FSK Superheterodyne Receiver REVISION NUMBER 2 REVISION DATE 1/12 DESCRIPTION Updated Ordering Information, Absolute Maximum Ratings, DC and AC Electrical Characteristics, TOCs 5, 6, 7, 11; updated Pin Configuration, Pin Description, Functional Diagram, Phase-Locked Loop section, Power-Supply Connections section, Typical Application Circuit, and Table 3.