Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsInterface ICsInterface IC - I/O extensions POR I²C, SMBus 400 kHz TSSOP 16

MAX7310

2-Wire-Interfaced 8-Bit I/O Port Expander

with Reset

________________________________________________________________ Maxim Integrated Products 1

19-2698; Rev 3; 2/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

General Description

The MAX7310 provides 8-bit parallel input/output port

expansion for SMBus™-compatible and I

C-compatible

applications. The MAX7310 consists of an input port

ister, a configuration register, a bus timeout register,

and an SMBus/I

C-compatible serial interface. The sys-

tem master can invert the MAX7310 input data by writ-

ing to the active-high polarity inversion register. The

system master can enable or disable bus timeout by

writing to the bus timeout register.

Any of the eight I/O ports may be configured as input or

output. An active-low reset input sets the eight I/Os as

inputs. Three address select pins configure one of 56

slave ID addresses.

The MAX7310 is available in 16-pin thin QFN, TSSOP,

and QSOP packages and is specified over the -40°C to

+125°C automotive temperature range.

Applications

Servers

RAID Systems

Industrial Control

Medical Equipment

Instrumentation, Test Measurement

Features

♦ 400kHz 2-Wire Interface

♦ 2.3V to 5.5V Operation

♦ Low Standby Current (1.7µA typ)

♦ Bus Timeout for Lock-Up-Free Operation

♦ 56 Slave ID Addresses

♦ Polarity Inversion

♦ Eight I/O Pins that Default to Inputs on Power-Up

♦ 5V Tolerant Open-Drain Output on I/O0

♦ 4mm x 4mm, 0.8mm Thin QFN Package

♦ -40°C to +125°C Operation

Ordering Information

PART

TEMP RANGE

PIN-

PACKAGE

PKG

CODE

MAX7310AUE

-40°C to +125°C

16 TSSOP —

MAX7310AEE

-40°C to +125°C

16 QSOP —

MAX7310ATE

-40°C to +125°C

16 Thin QFN

T1644-4

TOP VIEW

TSSOP/QSOP

SCL

SDA

AD0

AD1

AD2

I/O0

I/O1

GND

V+

RESET

I/O7

I/O6

I/O5

I/O4

I/O3

I/O2

THIN QFN

I/O4

11 10 9

1234

I/O7

I/O6

I/O5

I/O3

I/O2

GND

I/O1

V+

SCL

SDA

AD0

AD1

AD2

I/O0

RESET

MAX7310ATE

MAX7310

Pin Configurations

SMBus is a trademark of Intel Corp.

Summary of content (15 pages)

PAGE 1
9-2698; Rev 3; 2/05 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset Features The MAX7310 provides 8-bit parallel input/output port expansion for SMBus™-compatible and I2C-compatible applications. The MAX7310 consists of an input port register, an output port register, a polarity inversion register, a configuration register, a bus timeout register, and an SMBus/I2C-compatible serial interface.
PAGE 2
MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset ABSOLUTE MAXIMUM RATINGS V+ to GND ................................................................-0.3V to +6V I/O1–I/O7 as an Input .......................(VSS - 0.3V) to (VDD + 0.3V) I/O0 as an Input..............................................(VSS - 0.3V) to +6V SCL, SDA, AD0, AD1, AD2, RESET ...............(VSS - 0.3V) to +6V DC Current on I/O0 ........................................................ +400µA DC Current on I/O1 to I/O7 ......
PAGE 3
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset (V+ = 2.3V to 5.5V, GND = 0, RESET = V+, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Leakage Current MIN TYP -1 Input Capacitance MAX UNITS +1 µA 10 pF AC ELECTRICAL CHARACTERISTICS (V+ = 2.3V to 5.5V, GND = 0, RESET = V+, TA = -40°C to +125°C, unless otherwise noted.
PAGE 4
Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) 30 29 28 27 V+ = 3.3V, fSCL = 0, NO LOAD ON I/O0–I/O7 60 2.00 1.75 1.50 fSCL = 440kHz, NO LOAD ON I/O0–I/O7 50 40 30 20 1.25 26 1.00 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) SUPPLY VOLTAGE (V) I/O0–I/O7 OUTPUT SINK CURRENT vs. TEMPERATURE I/O0–I/O7 OUTPUT SINK CURRENT vs. SUPPLY VOLTAGE I/O1–I/O7 OUTPUT SOURCE CURRENT vs.
PAGE 5
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset PIN TSSOP/ QSOP THIN QFN NAME 1 15 SCL Serial Clock Line 2 16 SDA Serial Data Line 3 1 AD0 Address Input 0 4 2 AD1 Address Input 1 5 3 AD2 Address Input 2 6 4 I/O0 Input/Output Port 0 (Open Drain) 7 5 I/O1 Input/Output Port 1 8 6 GND Supply Ground 9–14 7–12 I/O2–I/O7 15 13 RESET 16 14 V+ — PAD Exposed pad FUNCTION Input/Output Port 2—Input/Output Port 7 External Reset (Active Low).
PAGE 6
MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset Table 1 is the register address table. Tables 2–6 list register 0 through register 4 information. SCL is high. The bus is then free for another transmission (Figure 3). Serial Interface Bit Transfer Serial Addressing One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 4). The MAX7310 operates as a slave that sends and receives data through a 2-wire interface.
PAGE 7
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset MAX7310 SDA SCL DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED Figure 4. Bit Transfer START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT SCL 1 2 8 9 SDA BY TRANSMITTER S SDA BY RECEIVER Figure 5. Acknowledge FIXED SDA PROGRAMMABLE A5 0 A4 A3 MSB A2 A1 A0 R/W ACK LSB SCL Figure 6. Slave Address The first bits (MSBs) of the MAX7310 slave address are always zero.
PAGE 8
MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset Table 1. Register Address REGISTER ADDRESS (hex) FUNCTION 0x00 Input port register 0x01 Output port register Read/write byte. 0x02 Polarity inversion register Read/write byte. 0x03 Configuration register Read/write byte. 0x04 Timeout register Read/write byte. 0xFF Reserved register PROTOCOL Read byte. Factory reserved. Do not write to this register. Table 2.
PAGE 9
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset MAX7310 Table 7.
PAGE 10
MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset Table 7.
PAGE 11
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset DATA FROM SHIFT REGISTER CONFIGURATION REGISTER D Q OUTPUT PORT REGISTER DATA FF Q D WRITE CONFIGURATION PULSE MAX7310 DATA FROM SHIFT REGISTER CK Q WRITE PULSE I/O0 FF CK Q OUTPUT PORT REGISTER ESD-PROTECTION DIODE GND INPUT PORT REGISTER D Q FF READ PULSE DATA FROM SHIFT REGISTER CK Q D Q INPUT PORT REGISTER DATA POLARITY REGISTER DATA FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER Figure 7.
PAGE 12
MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset DATA FROM SHIFT REGISTER DATA FROM SHIFT REGISTER OUTPUT PORT REGISTER DATA CONFIGURATION REGISTER D V+ Q ESD-PROTECTION DIODE FF WRITE CONFIGURATION PULSE CK Q WRITE PULSE D Q I/O1 TO I/O7 FF CK Q ESD-PROTECTION DIODE OUTPUT PORT REGISTER INPUT PORT REGISTER D Q FF READ PULSE DATA FROM SHIFT REGISTER CK Q D Q FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER Figure 8.
PAGE 13
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset 1 2 3 4 5 6 7 9 8 COMMAND BYTE SLAVE ADDRESS SDA S 0 A5 A4 A3 A2 A1 A0 START CONDITION MAX7310 SCL 0 A 0 0 0 0 0 0 DATA TO PORT 0 R/W ACKNOWLEDGE FROM SLAVE 1 A A DATA 1 ACKNOWLEDGE FROM SLAVE P ACKNOWLEDGE FROM SLAVE WRITE TO PORT DATA OUT FROM PORT DATA 1 VALID tPV Figure 9.
PAGE 14
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 24L QFN THIN.EPS MAX7310 2-Wire-Interfaced 8-Bit I/O Port Expander with Reset PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm 21-0139 C 1 2 PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.
PAGE 15
2-Wire-Interfaced 8-Bit I/O Port Expander with Reset TSSOP4.40mm.EPS QSOP.EPS PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH 21-0055 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.