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MAX791

Microprocessor Supervisory Circuit

________________________________________________________________ Maxim Integrated Products 1

19-0075; Rev. 7; 11/05

General Description

The MAX791 microprocessor (µP) supervisory circuit

reduces the complexity and number of components need-

ed to monitor power-supply and battery-control functions

in µP systems. The 50µA supply current makes the

MAX791 ideal for use in portable equipment, while the 6ns

chip-enable propagation delay and 250mA output capa-

bility (25mA in battery-backup mode) make it suitable for

larger, higher-performance equipment.

The MAX791 comes in 16-pin DIP, TSSOP, and narrow SO

packages and provides the following functions:

•µP reset.

–

—

–

output is asserted during power-up,

power-down, and brownout conditions, and is guaran-

teed to be in the correct state for V

down to 1V,

even with no battery in the circuit.

• Manual-reset input.

•A 1.25V threshold detector provides for power-fail

warning and low-battery detection, or monitors a

power supply other than +5V.

• Two-stage power-fail warning. A separate low-line

comparator compares V

to a threshold 150mV

above the reset threshold.

• Backup-battery switchover for CMOS RAM, real-time

clocks, µPs, or other low-power logic.

• Software monitoring of backup-battery voltage.

•A watchdog-fault output is asserted if the watchdog

input has not been toggled within either a preset or

an adjustable timeout period.

• Write protection of CMOS RAM or EEPROM.

• Pulsed watchdog output to give advance warning of

impending

–

—

–

assertion caused by watchdog timeout.

Applications

Computers Critical µP Power Monitoring

Controllers Intelligent Instruments

Portable/Battery-

Powered Equipment

Features

♦ Precision 4.65V Voltage Monitoring

♦ 200ms Power-OK/Reset Time Delay

♦ Independent Watchdog Timer—Preset or Adjustable

♦ 1µA Standby Current

♦ Power Switching

250mA Output in V

Mode

25mA Output in Battery-Backup Mode

♦ On-Board Gating of Chip-Enable Signals

Memory Write-Cycle Completion

6ns CE Gate Propagation Delay

♦ MaxCap



or SuperCap



Compatible

♦ Voltage Monitor for Power-Fail or Low-Battery Warning

♦ Backup-Battery Monitor

♦ Guaranteed

–

—

–

Valid to V

= 1V

Ordering Information

WDPO

RESET

WDO

CE IN

GND

OUT

VBATT

TOP VIEW

MAX791

CE OUT

WDI

LOWLINE

SWT

PFI

PFO

BATT ON

DIP/SO/TSSOP

CMOS

RAM

MAX791

RESET

LOWLINE

WDI

CE IN

CE OUT

+5V

OTHER SYSTEM

RESET SOURCES

+12V

OUT

VBATT

MaxCap

A0–A15

+12V SUPPLY

FAILURE

BATT

SWT

ADDRESS

DECODE

0.1µF

0.47F*

PFI

PFO

GND

I/O

µP

NMI

INT

RESET

WDO

Pin Configuration

Typical Operating Circuit

PART TEMP RANGE PIN-PACKAGE

MAX791CPE 0°C to +70°C 16 Plastic DIP

MAX791CSE 0°C to +70°C 16 Narrow SO

MAX791C/D 0°C to +70°C Dice*

MAX791EPE -40°C to +85°C 16 Plastic DIP

MAX791ESE -40°C to +85°C 16 Narrow SO

MAX791EJE -40°C to +85°C 16 CERDIP

MAX791MJE -55°C to +125°C 16 CERDIP

MaxCap is a registered trademark of Cesiwid Inc. SuperCap is a registered trademark of Baknor Industries.

* Dice are specified at T

= +25°C.

Devices in PDIP, SO and TSSOP packages are available in both

leaded and lead-free packaging. Specify lead free by adding

the + symbol at the end of the part number when ordering.

Lead free not available for CERDIP package.

MAX791CUE 0°C to +70°C 16 TSSOP

MAX791EUE -40°C to +85°C 16 TSSOP

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Summary of content (19 pages)

PAGE 1
9-0075; Rev. 7; 11/05 Microprocessor Supervisory Circuit Applications Computers Controllers Portable/BatteryPowered Equipment Critical µP Power Monitoring Intelligent Instruments Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Precision 4.
PAGE 2
MAX791 Microprocessor Supervisory Circuit ABSOLUTE MAXIMUM RATINGS Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 10.53mW/°C above +70°C) ..........842mW Narrow SO (derate 8.70mW/°C above +70°C) ............696mW CERDIP (derate 10.00mW/°C above +70°C) ...............800mW TSSOP (derate 6.70mW/°C above +70°C) ..................533mW Operating Temperature Ranges MAX791C_ _ ......................................................O°C to +70°C MAX791E_ _ ............................................
PAGE 3
Microprocessor Supervisory Circuit MAX791 ELECTRICAL CHARACTERISTICS (continued) (VCC = 4.75V to 5.5V, VBATT = 2.8V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER BATT ON Output Low Voltage BATT ON Output Short-Circuit Current CONDITIONS TYP MAX ISINK = 3.2mA 0.1 0.4 ISINK = 25mA 0.7 1.
PAGE 4
MAX791 Microprocessor Supervisory Circuit ELECTRICAL CHARACTERISTICS (continued) (VCC = 4.75V to 5.5V, VBATT = 2.8V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER WDI Threshold Voltage (Note 4) WDI Input Current CONDITIONS VIH MIN TYP UNITS 0.75 x VCC VIL WDI = 0V MAX V 0.8 -50 WDI = VOUT -10 µA 20 50 1.25 1.30 V ±0.01 ±25 nA POWER-FAIL COMPARATOR PFI Input Threshold VCC = 5V 1.20 PFI Leakage Current –——– PFO Output Voltage ISINK = 3.
PAGE 5
Microprocessor Supervisory Circuit 50 46 42 38 -30 30 0 60 90 120 MAX791-02 1.0 0.5 150 80 60 40 -60 -30 30 0 60 90 120 -60 150 -30 30 0 60 90 120 TEMPERATURE (°C) VBATT-to-VOUT ON-RESISTANCE vs. TEMPERATURE VCC-to-VOUT ON-RESISTANCE vs. TEMPERATURE PFI THRESHOLD vs. TEMPERATURE VBATT = 4.5V PFI THRESHOLD (V) 10 0.9 0.8 0.7 0 30 60 90 120 150 MAX791-05 0.
PAGE 6
Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) WATCHDOG TIMEOUT vs. TIMING CAPACITOR 12 8 4 200 PROPAGATION DELAY (ns) WATCHDOG TIMEOUT (ms) 16 150 100 50 VBATT = 2.8V, IOUT = 0A 2 1 3 4 12 8 VCC = +5V CE IN = 0V TO 5V DRIVER SOURCE IMPEDANCE = 50Ω 4 0 0 0 10 20 5 VCC (V) 30 40 50 60 70 80 90 100 TIMING CAPACITOR (nF) VCC to VOUT vs. OUTPUT CURRENT 0 SLOPE = 0.8Ω 10 MAX791-14 100 SLOPE = 8Ω 10 VCC = 0V VBATT = 4.
PAGE 7
Microprocessor Supervisory Circuit PIN NAME FUNCTION 1 VBATT 2 VOUT Output Supply Voltage. VOUT connects to VCC when VCC is greater than VBATT and VCC is above the reset threshold. When VCC falls below VBATT and VCC is below the reset threshold, VOUT connects to VBATT. Connect a 0.1µF capacitor from VOUT to GND. 3 VCC Input Supply Voltage—+5V input 4 GND Ground. 0V reference for all signals. 5 BATT ON 6 –——– PFO 7 PFI 8 SWT Set Watchdog-Timeout Input.
PAGE 8
MAX791 Microprocessor Supervisory Circuit 25µs MIN MR 10 150mV LOWLINE 4.65V 7.5µs TYP 5 VCC RESET BATT ON 3 2 VOUT 1 CE IN 0V CE OUT VBATT 15µs TYP CHIP-ENABLE OUTPUT CONTROL Figure 2. Manual-Reset Timing Diagram 13 12 CE OUT CE IN V OUT MR 9 RESET GENERATION 15 RESET 8 TIMEBASE FOR RESET AND WATCHDOG 16 WDPO 11 WATCHDOG TRANSITION DETECTOR MANUAL RESET MR SWT WDI PFI 7 * WATCHDOG TIMER 14 6 WDO MAX791 * PFO * DIODES NOT REQUIRED ON OPEN-DRAIN OUTPUTS 1.
PAGE 9
Microprocessor Supervisory Circuit MAX791 15 TO µP RESET Watchdog Input 10k Figure –————– 4. Adding an External Pull-Down Resistor Ensures RESET is Valid with VCC Down to GND RESET Output The MAX791’s RESET output ensures that the µP powers up in a known state, and prevents code-execution errors during power-down or brownout conditions. The RESET output is active low, and typically sinks 3.2mA at 0.1V saturation voltage in its active state. When deasserted, RESET sources 1.6mA at typically VOUT - 0.
PAGE 10
MAX791 Microprocessor Supervisory Circuit +5V 3 VCC 1 VOUT VBATT 3.6V 2 µP POWER 0.1µF µP MAX791 15 RESET 11 WDI 10 LOWLINE WDPO RESET I/O 1/6 74HC04 16 3 14 VCC CLOCK 5 CD4013 D 9 MR WDO 14 GND 4 *1µF NMI INTERRUPT SET 6 +5V RESET VSS 7 4 Q 1 Q 2 TWO CONSECUTIVE WATCHDOG FAULT INDICATIONS REACTIVATE 4.7k *SETS Q HIGH ON POWER-UP Figure 6.
PAGE 11
Microprocessor Supervisory Circuit MAX791 +5V VCC RESET THRESHOLD VCC CE IN MAX791 CE OUT 15µs 100µs CE IN CE OUT 100µs CLOAD 50Ω DRIVER RESET GND RESET Figure 7. Reset and Chip-Enable Timing Figure 8. CE Propagation Delay Test Circuit enables the MAX791 to be used with most µPs. a low output-impedance driver. Chip-Enable Input CE IN is high impedance (disabled mode) while RESET is asserted. During a power-down sequence where V CC passes 4.
PAGE 12
MAX791 Microprocessor Supervisory Circuit FROM REGULATED SUPPLY 3 V CC VOUT 2 0.1µF 0.1µF Table 1. Input and Output States in Battery-Backup Mode µP POWER POWER TO CMOS RAM MAX791 VBATT 1 µP 3.0V 15 RESET LOWLINE 10 11 WDI GND 4 a) VOLTAGE REGULATOR 3 V CC 0.1 µF RESET NMI I/O LINE VOUT 2 0.1µF 3.0V 15 RESET PFO 6 11 WDI PFI µP RESET NMI I/O LINE GND 4 b) Figure 9. a) If the unregulated supply is inaccessible, LOWLINE generates the NMI for the µP.
PAGE 13
Microprocessor Supervisory Circuit MAX791 RESET THRESHOLD VBATT 1 VCC 2 VOUT 0.1µF VCC 200ms TYP 3 RESET CE IN CE OUT MAX791 SECOND CE PULSE ABSENT WHEN VBATT < 2V Figure 10. VCC and VBATT-to-VOUT Switch Battery On Output The Battery On (BATT ON) output indicates the status of the internal V CC /battery-switchover comparator, which controls the internal VCC and VBATT switches. For VCC greater than VBATT (ignoring the small hysteresis effect), BATT ON typically sinks 3.2mA at 0.
PAGE 14
MAX791 Microprocessor Supervisory Circuit +5V 3 VCC 1N4148 1 VBATT VOUT 2 0.47F MAX791 GND 4 cally ±30mV centered at VBATT, allowing use of a SuperCap and a simple charging circuit as a backup source (Figure 12). If VCC is above the reset threshold and VBATT is 0.5V above VCC, current flows to VOUT and VCC from VBATT until the voltage at VBATT is less than 0.5V above VCC. For example, with a SuperCap connected to VBATT and through a diode to VCC, if VCC quickly changes from 5.4V to 4.
PAGE 15
Microprocessor Supervisory Circuit Rp* +5V R1 CE VCC RAM 1 CE VOUT CE IN CE OUT MAX791 VIN PFI CE C1* RAM 2 CE R3 MAX791 R2 CE RAM 3 PFO CE MAX791 GND GND CE TO µP RAM 4 *OPTIONAL CE +5V PFO *MAXIMUM Rp VALUE DEPENDS ON THE NUMBER OF RAMs. MINIMUM Rp VALUE IS 1kΩ 0V 0V ACTIVE-HIGH CE LINES FROM LOGIC Figure 13. Alternate CE Gating Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply voltage using Figure 15’s circuit.
PAGE 16
MAX791 Microprocessor Supervisory Circuit +5V VCC MAX791 R2 GND +5V V- PFO MAXIMUM TRANSIENT DURATION (µs) 100 PFO PFI VCC = +5V TA = +25°C 0.1µF CAPACITOR FROM VOUT TO GND 80 MAX791-16 R1 60 40 20 0 0V 10 VTRIP 5 - 1.25 = 1.25 - VTRIP R1 R2 0V V- 100 1000 10,000 RESET COMPARATOR OVERDRIVE (mV) (Reset Threshold Voltage - VCC) NOTE: VTRIP IS NEGATIVE Figure 15. Monitoring a Negative Voltage Figure 16. Maximum Transient Duration Without Causing a Reset Pulse vs.
PAGE 17
Microprocessor Supervisory Circuit START VOUT SET WDI LOW VBATT WDPO RESET VCC WDO SUBROUTINE OR PROGRAM LOOP, SET WDI HIGH RETURN CE IN 0.11" CE OUT (2.794mm) GND BATT ON PFO WDI END PFI SWT MR LOWLINE Figure 17. Watchdog Flow Diagram 0.07" (1.
PAGE 18
MAX791 Microprocessor Supervisory Circuit Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) D E DIM E1 A A1 A2 A3 B B1 C D1 E E1 e eA eB L A3 A A2 L A1 0° - 15° C e B1 eA B eB D1 Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.) DIM PINS D D D D D D DIM D 0°-8° A 0.101mm 0.004in. e B A1 E C H L SO SMALL OUTLINE PACKAGE (0.150 in.
PAGE 19
Microprocessor Supervisory Circuit DIM E1 E D A 0°-15° Q L L1 e C B1 B S1 S DIM PINS D D D D D D 8 14 16 18 20 24 MILLIMETERS MIN MAX – 5.08 0.36 0.58 0.97 1.65 0.20 0.38 5.59 7.87 7.37 8.13 2.54 3.18 5.08 3.81 – 0.38 1.78 – 2.49 0.13 – INCHES MILLIMETERS MIN MAX MIN MAX – 0.405 – 10.29 – 0.785 – 19.94 – 0.840 – 21.34 – 0.960 – 24.38 – 1.060 – 26.92 – 1.280 – 32.51 TSSOP4.40mm.EPS CERDIP CERAMIC DUAL-IN-LINE PACKAGE (0.300 in.) A B B1 C E E1 e L L1 Q S S1 INCHES MIN MAX – 0.200 0.014 0.