Datasheet
MAX8702/MAX8703
Dual-Phase MOSFET Drivers
with Temperature Sensor
10 ______________________________________________________________________________________
A 10°C hysteresis keeps the output from oscillating
when the temperature is close to the threshold. The
thermal trip point is programmable up to +160°C
through an external resistor between TSET and AGND.
Use the following equation to determine the value of
the resistor:
R
TSET
= (85,210 / T) – (745,200 / T
2
) – 195
where R
TSET
is the value of the set-point resistor in kΩ
and T is the trip-point temperature in Kelvin.
The MAX8702 and MAX8703 include a thermal-shut-
down circuit that is independent of the temperature
sensor. The thermal shutdown has a fixed threshold of
+160°C (typ) with 10°C of thermal hysteresis. When the
die temperature exceeds +160°C, DH is pulled low and
DL is pulled high. The driver automatically resets when
the die temperature drops by +10°C.
Applications Information
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N
H
) must be able to dissipate
the resistive losses plus the switching losses at both
V
IN(MIN)
and V
IN(MAX)
. Calculate both of these sums.
Ideally, the losses at V
IN(MIN)
should be roughly equal
to losses at V
IN(MAX)
, with lower losses in between. If
the losses at V
IN(MIN)
are significantly higher than the
losses at V
IN(MAX)
, consider increasing the size of N
H
(reducing R
DS(ON)
but increasing C
GATE
). Conversely,
if the losses at V
IN(MAX)
are significantly higher than the
losses at V
IN(MIN)
, consider reducing the size of N
H
(increasing R
DS(ON)
but reducing C
GATE
). If V
IN
does
not vary over a wide range, the minimum power dissi-
pation occurs where the resistive losses equal the
switching losses.
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R
DS(ON)
), comes in a moderate-
sized package (i.e., one or two SO-8s, DPAK, or
D
2
PAK), and is reasonably priced. Ensure that the DL
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
gate-to-drain capacitor caused by the high-side MOS-
FET turning on; otherwise, cross-conduction problems
can occur.
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
where n
TOTAL
is the total number of phases.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
DS(ON)
required to stay within package
power dissipation often limits how small the MOSFETs
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
DS(ON)
) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
H
) due to switching losses is difficult since
it must allow for difficult quantifying factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching-loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N
H
:
where C
RSS
is the reverse transfer capacitance of N
H
and I
GATE
is the peak gate-drive source/sink current
(5A typ).
Switching losses in the high-side MOSFET can
become an insidious heat problem when maximum AC
adapter voltages are applied, due to the squared term
in the C × V
IN
2
× f
SW
switching-loss equation. If the
high-side MOSFET chosen for adequate R
DS(ON)
at
low battery voltages becomes extraordinarily hot when
biased from V
IN(MAX)
, consider choosing another
MOSFET with lower parasitic capacitance.
For the low-side MOSFET (N
L
), the worst-case power
dissipation always occurs at the maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
LOAD(MAX)
but are not quite high enough to exceed
PD N RESISTIVE
V
V
I
n
R
L
OUT
IN MAX
LOAD
TOTAL
DS ON
()
()
()
=−
1
2
PD N SWITCHING V
Cf
I
I
n
H IN MAX
RSS SW
GATE
LOAD
TOTAL
()
()
=
()
2
PD N RESISTIVE
V
V
I
n
R
H
OUT
IN
LOAD
TOTAL
DS ON
()
()
=
2