Datasheet

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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim's website at www.maxim-ic.com.

General Description

The MAX9111/MAX9113 single/dual low-voltage differen-

tial signaling (LVDS) receivers are designed for high-

speed applications requiring minimum power

consumption, space, and noise. Both devices support

switching rates exceeding 500Mbps while operating from

a single +3.3V supply, and feature ultra-low 300ps (max)

pulse skew required for high-resolution imaging applica-

tions such as laser printers and digital copiers.

The MAX9111 is a single LVDS receiver, and the

MAX9113 is a dual LVDS receiver.

Both devices conform to the EIA/TIA-644 LVDS standard

and convert LVDS to LVTTL/CMOS-compatible outputs.

A fail-safe feature sets the outputs high when the inputs

are undriven and open, terminated, or shorted. The

MAX9111/MAX9113 are available in space-saving 8-pin

SOT23 and SO packages. Refer to the MAX9110/

MAX9112 data sheet for single/dual LVDS line drivers.

________________________Applications

Features

o Low 300ps (max) Pulse Skew for High-Resolution

Imaging and High-Speed Interconnect

o Space-Saving 8-Pin SOT23 and SO Packages

o Pin-Compatible Upgrades to DS90LV018A and

DS90LV028A (SO Packages Only)

o Guaranteed 500Mbps Data Rate

o Low 29mW Power Dissipation at 3.3V

o Conform to EIA/TIA-644 Standard

o Single +3.3V Supply

o Flow-Through Pinout Simplifies PCB Layout

o Fail-Safe Circuit Sets Output High for Undriven

Inputs

o High-Impedance LVDS Inputs when Powered Off

MAX9111/MAX9113

Single/Dual LVDS Line Receivers with

Ultra-Low Pulse Skew in SOT23

________________________________________________________________

Maxim Integrated Products

OUT2

GND

OUT1

IN2+

IN2-

IN1-

IN1+

N.C.

GNDN.C.

OUTIN+

N.C.

IN-

OUT2

GNDIN2-

OUT1IN1+

IN2+

IN1-

MAX9113MAX9113

MAX9111

N.C.

IN+

N.C.

IN-

SOT23

OUT

N.C.

GND

MAX9111MAX9111

H = LOGIC LEVEL HIGH

L = LOGIC LEVEL LOW

(IN_+) - (IN_-)

≥ 100mV

≥

-100mV

OUT_

OPEN

SHORT

100Ω PARALLEL TERMINATION (UNDRIVEN)

Pin Configurations/Functional Diagrams/Truth Table

19-1803; Rev 3; 3/09

Ordering Information

PART

TEMP

RANGE

PIN-

PACKAGE

TOP

MARK

MAX9111EKA -40°C to +85°C 8 SOT23 AAEE

MAX9111ESA -40°C to +85°C 8 SO —

MAX9113EKA -40°C to +85°C 8 SOT23 AAED

MAX9113ESA -40°C to +85°C 8 SO —

MAX9113ASA/V+ -40°C to +125°C 8 SO —

Laser Printers

Digital Copiers

Cellular Phone

Base Stations

Telecom Switching

Equipment

Network Switches/Routers

LCD Displays

Backplane Interconnect

Clock Distribution

Typical Operating Circuit appears at end of data sheet.

/V denotes an automotive qualified part.

Denotes a lead(Pb)-free/RoHS-compliant package.

Summary of content (10 pages)

PAGE 1
9-1803; Rev 3; 3/09 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9111/MAX9113 single/dual low-voltage differential signaling (LVDS) receivers are designed for highspeed applications requiring minimum power consumption, space, and noise. Both devices support switching rates exceeding 500Mbps while operating from a single +3.
PAGE 2
MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +4V IN_ _ to GND .........................................................-0.3V to +3.9V OUT_ _ to GND...........................................-0.3V to (VCC + 0.3V) ESD Protection All Pins (Human Body Model, IN_+, IN_-) ..................................
PAGE 3
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 (VCC = +3.0V to +3.6V, TA = TMIN to TMAX. Typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.
PAGE 4
MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Test Circuit Diagrams IN_+ GENERATOR IN_- OUT_ R CL 50Ω 50Ω Figure 1. Receiver Propagation Delay and Transition Time Test Circuit IN_- +1.3V 0V DIFFERENTIAL VID = 200mV +1.2V IN_+ +1.1V tPLHD tPHLD 80% VOH 80% 50% OUT_ 50% 20% 20% VOL tTLH tTHL Figure 2.
PAGE 5
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 120 110 100 3.1 3.2 3.3 3.4 3.5 MAX9111 toc03 73 68 63 58 53 3.0 3.1 3.2 3.3 3.4 3.5 3.0 3.6 3.1 3.2 3.3 3.4 3.5 SUPPLY VOLTAGE (V) DIFFERENTIAL THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE MAX9113 POWER-SUPPLY CURRENT vs. FREQUENCY POWER-SUPPLY CURRENT vs. TEMPERATURE LOW-HIGH 18 HIGH-LOW 16 MAX9111 toc05 POWER-SUPPLY CURRENT (mA) MAX9111 toc04 50 40 BOTH CHANNELS SWITCHING 30 20 10 ONE SWITCHING 0 0.01 14 3.
PAGE 6
Typical Operating Characteristics (continued) (VCC = 3.3V, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, CL = 15pF, TA = +25°C and over recommended operating conditions, unless otherwise specified.) DIFFERENTIAL PROPAGATION DELAY vs. DIFFERENTIAL INPUT VOLTAGE 150 100 50 fIN = 20MHz 2.8 2.6 2.4 tPHLD 2.2 2.0 1.8 1.6 1.4 tPLHD 1.2 2.2 -40 -15 10 35 60 0 85 2.0 1.9 tPHLD 1.8 1.7 tPLHD 500 1000 1500 2000 0 2500 0.5 DIFFERENTIAL PROPAGATION DELAY (ns) 580 530 tTLH 480 430 380 2.9 2.
PAGE 7
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 PIN MAX9111 NAME MAX9113 FUNCTION SOT23-8 SO-8 SOT23-8 SO-8 1 8 1 8 VCC Power Supply 2 5 2 5 GND Ground 8 1 8 1 IN-/IN1- 7 2 7 2 IN+/IN1+ — — 5 4 IN2- Receiver Inverting Differential Input — — 6 3 IN2+ Receiver Noninverting Differential Input 3 7 3 7 OUT/OUT1 Receiver Output — — 4 6 OUT2 Receiver Output 4, 5, 6 3, 4, 6 — — N.C.
PAGE 8
MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 RC 1MΩ CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1500Ω IP 100% 90% DISCHARGE RESISTANCE PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES DEVICE UNDER TEST STORAGE CAPACITOR Ir 36.8% 10% 0 0 Figure 3a. Human Body ESD Test Modules __________ Applications Information Supply Bypassing Bypass VCC with high-frequency surface-mount ceramic 0.1µF and 0.
PAGE 9
Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 +3.3V +3.3V 0.001μF DIN_ 0.001μF 0.1μF RT = 100Ω DRIVER RECEIVER 0.1μF OUT_ LVDS MAX9110 MAX9112 MAX9111 MAX9113 Package Information Chip Information PROCESS: CMOS For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
PAGE 10
MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Revision History PAGES CHANGED REVISION NUMBER REVISION DATE 0 — 1 2/07 — 2 12/07 Updated Ordering Information, temperature, Switching Characteristics, Fail-Safe section. 1, 2, 3, 7 3 3/09 Added /V designation to Ordering Information and updated Termination section.