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General Description

The MAX9129 is a quad bus low-voltage differential sig-

naling (BLVDS) driver with flow-through pinout. This

device is designed to drive a heavily loaded multipoint

bus with controlled transition times (1ns 0% to 100%

minimum) for reduced reflections. The MAX9129

accepts four LVTTL/LVCMOS input levels and trans-

lates them to output levels of 250mV to 450mV (stan-

dard LVDS levels) into a 27Ω load at speeds up to

200Mbps (100MHz).

The power-on reset ensures that all four outputs are

disabled and high impedance during power up and

power down. The outputs can be set to high imped-

ance by two enable inputs, EN and EN, thus dropping

the device to a low-power state of 11mW. The enables

are common to all four drivers. The flow-through pinout

simplifies PC board layout and reduces crosstalk by

keeping the LVTTL/LVCMOS inputs and BLVDS outputs

separated.

The MAX9129 operates from a single +3.3V supply and

is specified for operation from -40°C to +85°C. It is

available in 16-pin QFN and TSSOP packages. Refer to

the MAX9121 data sheet for a quad LVDS line receiver

with flow-through pinout.

Applications

Cell Phone Base Stations

Add/Drop Muxes

Digital Cross-Connects

DSLAMs

Network Switches/Routers

Backplane Interconnect

Clock Distribution

Features

♦ Drive LVDS Levels into a 27Ω Load

♦ 1ns (0% to 100%) Minimum Transition Time

Reduces Reflections

♦ Guaranteed 200Mbps (100MHz) Data Rate

♦ Enable Pins for High-Impedance Output

♦ High-Impedance Outputs when Powered Off

♦ Glitch-Free Power-Up and Power-Down

♦ Hot Swappable

♦ Flow-Through Pinout

♦ Available in Tiny QFN Package (50% Smaller

than TSSOP)

♦ Single +3.3V Supply

MAX9129

Quad Bus LVDS Driver with

Flow-Through Pinout

MAX9129 MAX9121 MAX9129 MAX9121 MAX9129 MAX9121 MAX9129 MAX9121

BUS A

BUS B

CARD 1A CARD 10A CARD 1B CARD 2B

= TERMINATION

RESISTOR

MULTIPOINT FULL-DUPLEX TRANSMIT AND RECEIVE BUS

Typical Applications Circuit

19-2100; Rev 0; 8/01

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Functional Diagram appears at end of data sheet.

Pin Configurations appear at end of data sheet.

Ordering Information

PART TEMP. RANGE PIN-PACKAGE

MAX9129EGE -40°C to +85°C 16 QFN

MAX9129EUE -40°C to +85°C 16 TSSOP

________________________________________________________________ Maxim Integrated Products 1

Summary of content (13 pages)

PAGE 1
9-2100; Rev 0; 8/01 Quad Bus LVDS Driver with Flow-Through Pinout The power-on reset ensures that all four outputs are disabled and high impedance during power up and power down. The outputs can be set to high impedance by two enable inputs, EN and EN, thus dropping the device to a low-power state of 11mW. The enables are common to all four drivers. The flow-through pinout simplifies PC board layout and reduces crosstalk by keeping the LVTTL/LVCMOS inputs and BLVDS outputs separated.
PAGE 2
MAX9129 Quad Bus LVDS Driver with Flow-Through Pinout ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +4.0V IN_, EN, EN to GND....................................-0.3V to (VCC + 0.3V) OUT_+, OUT_- to GND..........................................-0.3V to +4.0V Short-Circuit Duration (OUT_+, OUT_-) .....................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin QFN (derate 18.5mW/°C above +70°C) .........1481mW 16-Pin TSSOP (derate 9.
PAGE 3
Quad Bus LVDS Driver with Flow-Through Pinout (VCC = +3.0V to +3.6V, RL = 27Ω ±1%, CL = 15pF, EN = high, EN = low, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C.) (Notes 3, 4, 5) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Differential Propagation Delay High to Low tPHLD Figures 2 and 3 1.0 1.98 3.0 ns Differential Propagation Delay Low to High tPLHD Figures 2 and 3 1.0 1.92 3.
PAGE 4
Typical Operating Characteristics (MAX9129EUE (TSSOP package), VCC = +3.3V, RL = 27Ω, CL = 15pF, TA = +25°C, unless otherwise noted.) (Note 5) OUTPUT LOW VOLTAGE vs. SUPPLY VOLTAGE 1.46 1.45 1.10 1.08 1.06 3.0 3.3 -14.11 -14.10 -14.09 -14.08 3.0 3.6 MAX9129 toc03 -14.12 1.04 1.44 3.3 3.6 3.0 3.3 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) OUTPUT HIGH-IMPEDANCE CURRENT vs. SUPPLY VOLTAGE DIFFERENTIAL OUTPUT VOLTAGE vs. SUPPLY VOLTAGE DIFFERENTIAL OUTPUT VOLTAGE vs.
PAGE 5
Quad Bus LVDS Driver with Flow-Through Pinout (MAX9129EUE (TSSOP package), VCC = +3.3V, RL = 27Ω, CL = 15pF, TA = +25°C, unless otherwise noted.) (Note 5) 56 55 MAX9129 toc11 2.00 1.95 1.90 tPLHD 1.85 -15 10 35 60 85 2.00 1.90 tPLHD 1.80 1.70 3.0 3.3 -40 3.6 -15 10 35 60 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) DIFFERENTIAL SKEW vs. SUPPLY VOLTAGE DIFFERENTIAL SKEW vs. TEMPERATURE TRANSITION TIME vs. SUPPLY VOLTAGE 50 40 30 20 60 40 0 3.6 tTLH 1.1 1.0 tTHL 0.
PAGE 6
Quad Bus LVDS Driver with Flow-Through Pinout MAX9129 Pin Description PIN QFN TSSOP 15 1 1, 4, 5, 16 2 3 6 NAME FUNCTION EN LVTTL/LVCMOS Enable Input. The driver is disabled when EN is low. EN is internally pulled down. When EN = high and EN = low or open, the outputs are active. For other combinations of EN and EN, the outputs are disabled and are high impedance. 2, 3, 6, 7 IN_ LVTTL/LVCMOS Driver Inputs 4 VCC Power-Supply Input. Bypass VCC to GND with 0.1µF and 0.001µF ceramic capacitors.
PAGE 7
Quad Bus LVDS Driver with Flow-Through Pinout ENABLES OUT_+ VCC IN_ RL/2 INPUTS EN EN H L or open IN_ GND +1.2V EN GENERATOR RL/2 EN MAX9129 Table 1. Input/Output Function Table CL 50Ω All other combinations of EN and EN OUTPUTS OUT_+ OUT_ - L L H H H L X Z Z OUT_1/4 MAX9129 CL Figure 4. Driver High-Impedance Delay Test Circuit EN WHEN EN = 0 OR OPEN VCC 50% 50% 0 VCC 50% 50% 0 EN WHEN EN = VCC tPZH tPHZ OUT_+ WHEN IN_ = VCC OUT_- WHEN IN_ = 0 VOH 50% 50% 1.2V 1.
PAGE 8
MAX9129 Quad Bus LVDS Driver with Flow-Through Pinout The reduction in characteristic impedance is approximated by the following formula: ZDIFF-loaded = ZDIFF-unloaded ✕ SQRT [Co / (Co + N ✕ CL / L)] where: ZDIFF-unloaded = unloaded differential characteristic impedance Co = unloaded trace capacitance (pF/unit length) CL = value of each capacitive load (pF) N = number of capacitive loads minimum transition time of 1ns (rated 0.
PAGE 9
Quad Bus LVDS Driver with Flow-Through Pinout OUT1- IN1 OUT1+ MAX9129 EN GND IN2 OUT2+ VCC OUT2- GND OUT3- IN3 OUT3+ IN4 OUT4+ EN OUT4- Figure 6.
PAGE 10
Quad Bus LVDS Driver with Flow-Through Pinout MAX9129 Pin Configurations TOP VIEW 14 OUT2+ IN2 1 13 OUT2- VCC 2 GND 5 12 OUT3- IN3 6 11 OUT3+ IN4 7 10 OUT4+ EN 8 9 OUT4- TSSOP 16 GND 3 IN3 4 MAX9129 5 MAX9129 GND 6 VCC 4 13 IN2 3 GND IN4 EN OUT4- OUT4+ 12 OUT2+ 11 OUT2- 10 OUT3- 9 OUT3+ 8 15 OUT1+ EN OUT1- OUT1+ 14 IN1 2 GND 7 16 OUT1- 15 IN1 EN 1 GND GND QFN (4mm x 4mm) (CONTACTS UNDER QFN) Functional Diagram OUT1+ IN1 OUT1- OUT2+ IN2 OUT2- OUT3+ IN3
PAGE 11
Quad Bus LVDS Driver with Flow-Through Pinout TSSOP,NO PADS.
PAGE 12
Quad Bus LVDS Driver with Flow-Through Pinout 12, 16,20, 24L QFN.
PAGE 13
Quad Bus LVDS Driver with Flow-Through Pinout Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.