9-5891; Rev 1; 9/11 EVALUATION KIT AVAILABLE MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel General Description The MAX9257A serializer pairs with the MAX9258A deserializer to form a complete digital video serial link. The devices feature programmable parallel data width, parallel clock frequency range, spread spectrum, and preemphasis.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ABSOLUTE MAXIMUM RATINGS VCC_ to GND.........................................................-0.5V to +4.0V Any Ground to Any Ground..................................-0.5V to +0.5V SDI+, SDI-, SDO+, SDO- to GND.........................-0.5V to +4.0V SDO+, SDO- Short Circuit to GND or VCCLVDS........Continuous DIN[0:15], GPIO[0:9], PCLK_IN, HSYNC_IN, VSYNC_IN, SCL/TX, SDA/RX, REM to GND.......... -0.5V to (VCCIO + 0.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A DC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25NC.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS Input Current IIN VIN = 0 to VCCIO VIN = 0 to VCC, REM input Input Clamp Voltage VCL ICL = -18mA MIN TYP MAX -20 +20 -20 +20 -1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A DC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25NC.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A AC ELECTRICAL CHARACTERISTICS (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25NC.) (Notes 5, 9) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 200.00 ns 70 MHz 65 % 4 ns 370 ps ps PCLK_IN TIMING REQUIREMENTS Clock Period tT 14.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A AC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25NC.) (Notes 5, 9) PARAMETER I2C SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING (Note 8) Maximum SCL Clock Frequency Minimum SCL Clock Frequency fSCL fSCL 4.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A DC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, differential input voltage |VID| = 0.05V to 1.2V, input commonmode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, |VID| = 0.2V, VCM = 1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A DC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, differential input voltage |VID| = 0.05V to 1.2V, input commonmode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, |VID| = 0.2V, VCM = 1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A AC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, VCCIO = +1.71V to +3.6V, RL = 50I Q1%, CL = 8pF, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at VCC_ = +3.3V, |VID| = 0.2V, VCM = 1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Typical Operating Characteristics (continued) (VCC_ = +3.3V, RL = 50O, CL = 8pF, TA = +25NC, unless otherwise noted.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 30 29 28 27 26 25 24 23 22 21 N.C. DIN0 REM VCCLVDS SDO+ SDO- GNDLVDS GNDSPLL VCCSPLL GPIO9 GPIO8 N.C. 36 35 34 33 32 31 30 29 28 27 26 25 GPIO9 GPIO8 VCCSPLL GNDSPLL GNDLVDS SDO+ VCCLVDS REM DIN0 TOP VIEW SDO- Pin Configuration N.C. 37 24 N.C.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A Pin Description PIN NAME FUNCTION TQFN LQFP 1, 18 2, 21 VCCIO 2, 11, 19, 34 3, 14, 22, 41 GND 3–8 4–9 DIN[9:14]/ GPIO[1:6] Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits word length, DIN_ not programmed as data inputs becomes GPIO (Table 22). DIN[9:14] are internally pulled down to ground.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A Pin Description (continued) PIN TQFN LQFP 29 34 30, 31, 32, 35, 38, 39, 35–39 42–46 NAME FUNCTION REM Remote Power-Up/Power-Down Select Input. Connect REM to ground for power-up to follow VCC. Connect REM high to VCC through 10kI resistor for remote power-up. REM is internally pulled down to GND. DIN[0:7] Data Inputs. DIN[0:7] are internally pulled down to ground.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A Pin Description (continued) PIN NAME 16 TX 17 LOCK 18 PCLK_OUT FUNCTION LVCMOS/LVTTL Control Channel UART Input. TX is internally pulled up to VCCOUT. Open-Drain Lock Output. LOCK asserts high to indicate PLLs are locked with correct serial-word boundary alignment. LOCK asserts low to indicate PLLs are not locked or incorrect serial-word boundary alignment was detected.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel RL/2 SDO+ VOD SDO- VOS RL/2 GND ((SDO+) + (SDO-))/2 SDOVOS(-) VOS(+) VOS(-) SDO+ VOS = |VOS(+) - VOS(-)| VOD(+) VOD = 0V VOD(-) VOD = |VOD(+) - VOD(-)| VOD(-) (SDO+) - (SDO-) Figure 1. MAX9257A LVDS DC Output Parameters VOUT PCLK_IN DIN VHYST-VID VHYST+ VID = 0V Figure 2. Input Hysteresis NOTE: PCLK_IN PROGRAMMED FOR RISING LATCH EDGE. +VID Figure 3.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel SDO+ RL SDOCL CL 80% 80% 20% 20% (SDO+) - (SDO-) tFALL tRISE Figure 4. MAX9257A LVDS Control Channel Output Load and Output Rise/Fall Times VIHMIN PCLK_IN VILMAX tSET tHOLD VIHMIN VIHMIN VILMAX VILMAX DIN, VSYNC_IN, HSYNC_IN NOTE: PCLK_IN PROGRAMMED FOR RISING LATCHING EDGE. Figure 5.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel EXPANDED TIME SCALE DIN, HSYNC_IN, VSYNC_IN N N+1 N+3 N+2 N+4 PCLK_IN N-1 N SDO tPSD1 FIRST BIT LAST BIT Figure 6. MAX9257A Parallel-to-Serial Delay tT VIHMIN tHIGH PCLK_IN VILMAX tF tR tLOW Figure 7. MAX9257A Parallel Input Clock Requirements CL PCLK_OUT MAX9258A SINGLE-ENDED OUTPUT LOAD 0.9 x VCCOUT DOUT NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCH EDGE. 0.1 x VCCOUT tR Figure 8.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel tT VOHMIN tHIGH PCLK_OUT VOLMAX tLOW Figure 10. MAX9258A Clock Output High and Low Time VOHMIN PCLK_OUT VOLMAX tDVB tDVA VOHMIN DOUT, VSYNC_OUT, HSYNC_OUT, LOCK VOLMAX NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE. Figure 11. MAX9258A Output Data Valid Times PD VIHMIN PD VILMAX tPUD tPDD DOUT, VSYNC, HSYNC POWERED DOWN Figure 12.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel SERIAL-WORD LENGTH SERIAL WORD N SERIAL WORD N+1 SERIAL WORD N+2 SDI LAST BIT FIRST BIT DOUT, HSYNC_OUT, VSYNC_OUT PARALLEL WORD N-1 PARALLEL WORD N-2 PARALLEL WORD N PCLK_OUT tSPD1 NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE. Figure 14. MAX9258A Serial-to-Parallel Delay INPUT TEMPLATE FOR LVDS SERIAL VSDI+ - VSDI+100mV +25mV -25mV 0V -100mV tJT 0.0UI tS 0.25UI tJT tS 0.50UI 0.75UI 1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ECU CAMERA VIDEO DATA MAX9257A MAX9258A PIXEL CLOCK PIXEL CLOCK HSYNC_OUT VSYNC_OUT VIDEO DATA DESERIALIZER SERIALIZER 100 PD 100 HSYNC_IN VSYNC_IN GPIO CCEN ERROR LOCK RX UART TX UARTTO-I2C UART SDA SCL I2C Figure 17.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Detailed Description The MAX9257A serializer pairs with the MAX9258A deserializer to form a complete digital video serial link. The electronic control unit (ECU) programs the registers in the MAX9257A, MAX9258A, and peripheral devices, such as a camera, during the control channel phase that occurs at startup or during the vertical blanking time. All control channel communication is half-duplex.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel The video data are coded using two overhead bits (EN0 and EN1) resulting in a serial-word length of N+2 bits. The devices feature programmable parity encoding that adds two parity bits to the serial word. Bit 0 (EN0) is the LSB that is serialized first without parity enabled. The parity bits are serialized first when parity is enabled.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 1. MAX9257A Power-Up Default Register Map (continued) REGISTER NAME REGISTER ADDRESS (hex) POWER-UP VALUE (hex) REG5 0x05 0xFA MAX9257A address = 1111 1010 REG6 0x06 0xFF End frame = 1111 1111 REG7 0x07 0xF8 MAX9258A address = 1111 1000 0x00 INTMODE = 0, interface with peripheral is UART INTEN = 0, interface with peripheral is disabled FAST = 0, UART bit rate = DC to 4.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 2.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Parallel-Word Width serial-data rate, and parity. Table 16 shows the parallelword width. The parallel-word width is made up of the video data bits, HSYNC, and VSYNC. The video data bits are pro grammable from 8 to 16 depending on the pixel clock, Serial-Word Length The serial-word length is made up of the parallel-word width, encoding bits, and parity bits.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 11. Format for 18-Bit Serial-Word Length with Parity (Parallel-Word Width = 14) BIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 NAME PR PRB EN0 EN1 HSYNC VSYNC D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 Table 12.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 16. Parallel-Word Width FREQUENCY 1/fSSM PARALLEL-WORD WIDTH PWIDTH (REG0[2:0]) 10 000 12 001 14 010 16 011 18 1XX fSPREAD (MAX) fPCLK_IN TIME Table 17. MAX9258A Spread fSPREAD (MIN) PRATE (REG1[7:6]) SPREAD (%) 00 Off Figure 21.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 20. MAX9257A Modulation Rate SERIAL-WORD LENGTH 12 14 16 18 20 SRATE PRATE PCLK RANGE (MHz) MODULATION RATE 11 11 40–70 PCLK/2728 fSSM RANGE (kHz) 14.7 to 25.7 11 10 33.3–40 PCLK/1736 19.2 to 23.0 10 10 20–33.3 PCLK/1612 12.4 to 20.7 10 01 16.6–20 PCLK/992 16.7 to 20.2 01 01 10–16.6 PCLK/1116 9.0 to 14.9 01 00 8.3–10 PCLK/744 11.2 to 13.4 00 00 5–8.3 PCLK/868 5.8 to 9.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel LVDS Output Preemphasis (SDO±) The MAX9257A features programmable preemphasis where extra current is added when the LVDS outputs transition on the serial link. Preemphasis provides addi tional current to the normal drive current. For example, 20% preemphasis provides 20% greater current than the normal drive current. Current is boosted only on the transitions and returns to the normal drive current after switching.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Base Mode and Bypass Mode (Basics) In the control channel phase, there are two modes: base and bypass. In base mode, ECU always communicates using the MAX9257A/MAX9258A UART protocol and communication with a peripheral device is performed in I2C by the MAX9257A. Packets not addressed to the MAX9257A or the MAX9258A get converted to I2C and passed to the peripheral device.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel VSYNC_IN T1 SDI/O T3 T2 HSK VIDEO VIDEO CCEN TX RX FROZEN DOUT_ T1 = TIME TO ENTER CONTROL CHANNEL T2 = STO TIMEOUT PERIOD T3 = CONTROL CHANNEL EXIT TIME DUE TO STO HSK = HANDSHAKING BETWEEN THE MAX9257 AND THE MAX9258 Figure 22. Control Channel Closing Due to STO Timeout ETO Timer The ETO (end timeout) timer closes the control channel if the ECU stops communicating for the ETO timeout period.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel VSYNC_IN T1 SDI/O VIDEO T5 ECU ACTIVITY HSK VIDEO T4 (BASE MODE) CCEN T4 (BYPASS MODE) TX RX DOUT_ FROZEN T1 = TIME TO ENTER CONTROL CHANNEL T4 = ETO TIMEOUT PERIOD T5 = CONTROL CHANNEL EXIT TIME DUE TO ETO HSK = HANDSHAKING BETWEEN MAX9257 AND MAX9258 Figure 23.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel sends three special synchronization words before entering the video phase. Training sequence is used to resynchronize the devices before the video phase starts. The MAX9257A/MAX9258A control channel duration is independent of VSYNC. The control channel does not close when VSYNC deasserts, which allows the use of a VSYNC interrupt signal on VSYNC_IN. The control channel must be closed by STO, ETO, or EF.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Powering the MAX9257A with Serialization Enabled (REM = Ground at Power-Up) When REM is grounded, the MAX9257A fully powers up when power is applied. The power-down bit PD (REG4[4]) is disabled and serialization bit SEREN (REG4[3]) is enabled. If PCLK_IN is not running, the MAX9257A stays in the control channel. After PCLK_IN is applied, the control channel times out due to STO, ETO, or EF.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel PRBS Errors During the PRBS test, the MAX9258A checks received PRBS data words by comparing them to internally gener ated PRBS data. Detected errors are counted in the PRBS error register (REG12) in the MAX9258A. Whenever the number of detected PRBS errors is more than 0, ERROR asserts low. The PRBS error register is reset when ECU writes a 0 to PRBSEN register (REG4[0]).
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Once serialization is enabled, the programming of registers (including the control channel overhead time) must be completed within the vertical blanking time to avoid loss of video data. VSYNC can deassert while control channel remains open after eight pixel clock cycles. The control channel phase begins on the transition of the programmed active edge of VSYNC_IN.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel includes data-bit ordering conversion because UART transmits the LSB in first while I2C transmits the MSB first. UART/I2C read delay is a maximum 34 bit times when reading from an I2C peripheral. The devices store their own 7-bit device addresses in register REG5. All packets not addressed to the MAX9257A/MAX9258A are forwarded to the UARTtoI2C converter.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel UART synchronization frame sets the operating baud rate of the control channel. At power-up, UART data rate must be between 95kbps to 400kbps. After power-up, UART data rate can be programmed according to Tables 28 and 29. Data is serialized starting with the LSB first. The synchronization frame is 0x54 as shown in Figure 27.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Read Packet The ECU writes the sync frame, 7-bit device address plus read/write bit (R/W = 1 for read), 8-bit register address, and number of bytes to be read. The addressed device responds with read data bytes (Figure 29). UART read delay is maximum 4 bit times when reading from the MAX9257A or the MAX9258A. Time Between Frames Up to two high bit times are allowed between frames.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel I2C The MAX9257A features a UART-to-I2C converter that converts UART packets to I2C. The UART-to-I2C con verter works as a repeater between the ECU and external I2C slave devices. The MAX9257A acts as the master and converts UART read/write packets from the ECU to I2C read/write for external I2C slave devices. For writes, the UART-to-I2C converts the UART packets received directly into I2C.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Applications Information PRBS Test The devices have built-in circuits for testing bit errors on the serial link. The MAX9257A has a PRBS generator and the MAX9258A has a PRBS checker. The length of the PRBS pattern is programmable from 221 to 235 word length or continuous by programming REG9[7:4] in the MAX9257A.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Optimally Choosing AC-Coupling Capacitors Voltage droop and the digital sum variaton (DSV) of transmitted symbols cause signal transitions to start from different voltage levels. Because the transition time is finite, starting the signal transition from different voltage levels causes timing jitter. The time constant for an AC-coupled link needs to be chosen to reduce droop and jitter to an acceptable level.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Cables and Connectors Interconnect for LVDS typically has a differential imped ance of 100I. Use cables and connectors that have matched differential impedance to minimize impedance discontinuities. Twisted-pair and shielded twisted-pair cables offer superior signal quality compared to ribbon cable and tend to generate less EMI due to magnetic field canceling effects.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A Register Table (continued) ADDRESS BITS DEFAULT NAME DESCRIPTION Control channel start timeout: (STO) times out if ECU does not start using control channel within this amount of time after control channel session is enabled.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A Register Table (continued) ADDRESS BITS DEFAULT NAME 7 0 VEDGE 6 0 5 1 CKEDGE 4 0 PD 3 1 SEREN 2 0 BYPFPLL 1 0 0 0 PRBSEN 7:1 1111101 DEVICEID 0 0 6 7:1 1111111 7 VSYNC active edge at camera interface 0 = falling (default), 1 = rising Reserved (set to 0) 4 5 DESCRIPTION PCLK active edge at camera interface 0 = falling, 1 = rising (default) Power mode 0 = power-up, 1 = po
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257A Register Table (continued) ADDRESS 9 10 11 12 13 14 15 BITS DEFAULT NAME 7:4 0000 PRBSLEN PRBS test number of words 1111 = continuous else = 2(PRBSLEN + 21) 3 0 GPIO9DIR GPIO 9 direction 0 = input (default), 1 = output 2 0 GPIO8DIR GPIO 8 direction 0 = input (default), 1 = output 1 0 GPIO9* General purpose input output 9 0 0 GPIO8* General purpose input output 8 7 0 GPI
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A Register Table ADDRESS BITS 7:6 DEFAULT 10 NAME DESCRIPTION PRATE Pixel clock frequency range 00 = 5MHz to 10MHz 01 = 10MHz to 20MHz 10 = 20MHz to 40MHz (default) 11 = 40MHz to 70MHz 5:4 11 SRATE Serial-data rate range 00 = 60Mbps to 100Mbps 01 = 100Mbps to 200Mbps 10 = 200Mbps to 400Mbps 11 = 400Mbps to 840Mbps (default) 3 0 PAREN Parity enable 0 0 = disabled (default), 1 = enabled 2:0
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A Register Table (continued) ADDRESS BITS DEFAULT NAME DESCRIPTION Control channel end timeout: (ETO) times out if ECU does not use control channel for this amount of time after it has already used at least once.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258A Register Table (continued) ADDRESS 7 BITS DEFAULT NAME 7 0 INTMODE Interface mode 0 = UART (default), 1 = I2C 6 0 INTEN Interface enable 0 = disabled (default), 1 = enabled 5 0 FAST Fast UART transceiver 0 = bit rate = DC to 4.25Mbps (default), 1 = bit rate = 4.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ESD Protection The MAX9257A/MAX9258A ESD tolerance is rated for Human Body Model, Machine Model, IEC 61000-4-2 and ISO 10605. The ISO 10605 and IEC 61000-4-2 standards specify ESD tolerance for electronic systems. LVDS outputs on the MAX9257A and LVDS inputs on the MAX9258A meet ISO 10605 ESD protection and IEC 61000-4-2 ESD protection. All other pins meet the Human Body Model and Machine Model ESD tolerances.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Functional Diagram BYPASS MAX9257A SERIALIZER FILTER PLL PARALLEL INPUTS CLK IN DIN[0:15] HSYNC_IN 1.5% TO 4% SPREAD PLL N x PCLK_IN PCLK_IN 1x CLK OUT ENCODE/ DC BALANCE + FIFO LVDS Tx PARALLEL TO SERIAL SDO1.
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Typical Operating Circuit 10 UP TO 20m CABLE LENGTH DATA 10 PCLK HSYNC ECU VSYNC SERIAL I/O 100I SERIAL I/O 100I LOCK C RX PCLK HSYNC VSYNC SERIALIZED DIGITAL VIDEO MAX9258A TX DATA MAX9257A CMOS IMAGE SENSOR SCL SDA CONTROL CHANNEL CONTROL UNIT REMOTE CAMERA ASSEMBLY Chip Information Ordering Information PART TEMP RANGE PIN-PACKAGE MAX9257AGTL/V+ -40NC to +105NC 40 TQFN-EP* MAX9257AGCM
MAX9257A/MAX9258A Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Revision History REVISION NUMBER REVISION DATE 0 6/11 Initial release 1 9/11 Changed ACTOFFSET range settings from 00 = 11mV to 23mV and 01 = 23mV to 11mV DESCRIPTION PAGES CHANGED — 7, 24, 41, 47 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.