Datasheet
MAX9260 Evaluation Kit
Evaluates: MAX9260
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Table 1. Jumper Descriptions (continued)
JUMPER SIGNAL SHUNT POSITION DESCRIPTION
JU144 INT Not installed* Connects U1 to USB through level translator U14
JU151 U15 AD2
1-2* Selects U15 I
2
C device address
2-3 Selects U15 I
2
C device address
Open Reserved for factory diagnostic tests
JU152 U15 AD0
1-2* Selects U15 I
2
C device address
2-3 Selects U15 I
2
C device address
Open Reserved for factory diagnostic tests
JU153 U15 SDA
1-2*
Connects U15 MAX7324 to I
2
C bus; MS must be low (SW1) and
CDS must be low (JU1 = 2-3 on both boards)
Open Disconnects U15 MAX7324 from I
2
C bus; MS may be high (SW1)
JU154 U15 SCL
1-2*
Connects U15 MAX7324 to I
2
C bus; MS must be low (SW1) and
CDS must be low (JU1 = 2-3 on both boards)
Open Disconnects U15 MAX7324 from I
2
C bus; MS may be high (SW1)
JU191 AUDIO-SCL
1-2* U12 sends I
2
C initialization commands to audio chip U20
Open Disconnects audio I
2
C bus pullup resistor
JU192 AUDIO-SDA
1-2* U12 sends I
2
C initialization commands to audio chip U20
Open Disconnects audio I
2
C bus
JU193 AUDIO-SCL
1-2* U12 sends I
2
C initialization commands to audio chip U20
Open Disconnects audio I
2
C bus pullup resistor
JU194 AUDIO-SDA
1-2* U12 sends I
2
C initialization commands to audio chip U20
Open Disconnects audio I
2
C bus
JU201 U20 ADD
1-2 *
U20 ADD = GND; selects U20 device address 0010 000x (0x20)
(on audio I
2
C bus).
3-4
U20 ADD = IOVDD; selects U20 device address 0010 001x (0x22)
(on audio I
2
C bus)
5-6
U20 ADD = AUDIO_SDA; selects U20 device address 0010 011x
(0x26) (on audio I
2
C bus)
Open Reserved
JU202 HPS
1-2*
U20 MAX9850 headphone sense controlled by the insertion of
headphones
Open U20 MAX9850 headphone sense switch forced open
JU203 I
2
S SD
1-2* U1 I
2
S audio drives U20 MAX9850 audio DAC
Open Disconnects I
2
S signals
JU204 I
2
S SCK
1-2* U1 I
2
S audio drives U20 MAX9850 audio DAC
Open Disconnects I
2
S signals
JU205 I
2
S WS
1-2* U1 I
2
S audio drives U20 MAX9850 audio DAC
Open Disconnects I
2
S signals
JU206 MCLK
1-2* U20 MCLK = 33MHz crystal oscillator Y20
1-3 U20 MCLK = PCLK_OUT
1-4 U20 MCLK = PCLK_OUT divided by 2
Open Reserved