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MAX9273

22-Bit GMSL Serializer with Coax or

STP Cable Drive

Typical Application Circuit appears at end of data sheet.

19-6384; Rev 1; 11/12

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part,

refer to www.maximintegrated.com/MAX9273.related.

General Description

The MAX9273 compact serializer is designed to drive

50I coax or 100I shielded twisted-pair (STP) cable.

The device pairs with the MAX9272 deserializer. The

parallel input is programmable for single or double input.

Double input allows higher pixel clock input frequency by

registering two pixels of typical image-sensor video data

before serializing. This doubles the maximum pixel clock

frequency compared to single input.

The device features an embedded control channel that

operates at 9.6kbps to 1Mbps in UART and mixed UART/

C modes, and up to 400kbps in I

C mode. Using the

control channel, a microcontroller (FC) is capable of

programming serializer, deserializer, and camera (or any

peripheral) registers at any time, independent of video

timing. There is one dedicated GPIO, four optional GPIOs,

and a GPO output, allowing remote power-up of a camera

module, camera frame synchronization, and other uses.

Error-detection and correction coding are programmable.

For driving longer cables, the serializer has program-

mable pre/deemphasis. Programmable spread spectrum

is available on the serial output. The serial output meets

ISO 10605 and IEC 61000-4-2 ESD standards. The core

supply range is 1.7V to 1.9V and the I/O supply range is

1.7V to 3.6V. The device is available in a 40-pin (6mm x

6mm) TQFN-EP package with 0.5mm lead pitch and oper-

ates over the -40NC to +105NC temperature range.

Applications

Automotive Camera Systems

Navigation Displays

Benefits and Features

S Ideal for Camera Applications

Drives Low-Cost 50I Coax Cable and FAKRA

Connectors or 100I STP

Error Detection/Correction

 9.6kbps to 1Mbps Control Channel in I

C-to-I

Mode with Clock Stretch Capability

Best-in-Class Supply Current: 75mA (max)

Double-Rate Clock for Megapixel Cameras

Serializer Pre/Deemphasis Allows 15m Cable at

Full Speed

 40-Pin (6mm x 6mm) TQFN Package with 0.5mm

Lead Pitch

High-Speed Data Serialization for Megapixel

Cameras

 Up to 1.5Gbps Serial-Bit Rate with Single or

Double Input: 6.25MHz to 100MHz Clock

S Multiple Control-Channel Modes for System

Flexibility

 9.6kbps to 1Mbps Control Channel in UART-to-

UART or UART-to-I

C Modes

Reduces EMI and Shielding Requirements

 Output Programmable for 100mV to 500mV

Single-Ended or 100mV to 400mV Differential

 Programmable Spread Spectrum on the Serial

Output Reduces EMI

 Bypassable Input PLL for Parallel Clock Jitter

Attenuation

 Tracks Spread Spectrum on Parallel Input

Peripheral Features for Camera Power-Up and

Verification

 Built-In PRBS Generator for BER Testing of the

Serial Link

 Up to Five GPIO Ports

 Dedicated “Up/Down” GPO for Camera Frame

Sync Trigger and Other Uses

Reduces Power Requirements

 Remote/Local Wake-Up from Sleep Mode

Meets Rigorous Automotive and Industrial

Requirements

 -40NC to +105NC Operating Temperature

 ±8kV Contact and ±15kV Air ISO 10605 and

IEC 61000-4-2 ESD Protection

EVALUATION KIT AVAILABLE

For pricing, delivery, and ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.

Summary of content (49 pages)

PAGE 1
EVALUATION KIT AVAILABLE MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive General Description The MAX9273 compact serializer is designed to drive 50I coax or 100I shielded twisted-pair (STP) cable. The device pairs with the MAX9272 deserializer. The parallel input is programmable for single or double input. Double input allows higher pixel clock input frequency by registering two pixels of typical image-sensor video data before serializing.
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MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive TABLE OF CONTENTS General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Benefits and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive TABLE OF CONTENTS (continued) Hamming Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 HS/VS Encoding and/or Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Serial Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive LIST OF FIGURES Figure 1. Serial-Output Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 2. Output Waveforms at OUT+, OUT- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 3. Single-Ended Output Template . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive LIST OF TABLES Table 1. Power-Up Default Register Map (see Table 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 2. Input Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 3. Data-Rate Selection Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Absolute Maximum Ratings* AVDD to EP...........................................................-0.5V to +1.9V DVDD to EP...........................................................-0.5V to +1.9V IOVDD to EP..........................................................-0.5V to +3.9V OUT+, OUT- to EP................................................-0.5V to +1.9V All other pins to EP............................... -0.5V to (VIOVDD + 0.
PAGE 7
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive DC ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = 1.7V to 1.9V, VIOVDD = 1.7V to 3.6V, RL= 100I ±1% (differential), EP connected to PCB ground (GND), TA = -40NC to +105NC, unless otherwise noted. Typical values are at VAVDD = VDVDD = VIOVDD = 1.8V, TA = +25NC.
PAGE 8
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive DC ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = 1.7V to 1.9V, VIOVDD = 1.7V to 3.6V, RL= 100I ±1% (differential), EP connected to PCB ground (GND), TA = -40NC to +105NC, unless otherwise noted. Typical values are at VAV DD = VDVDD = VIOVDD = 1.8V, TA = +25NC.
PAGE 9
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive AC ELECTRICAL CHARACTERISTICS (continued) (VDVDD = VAVDD = 1.7V to 1.9V, VIOVDD = 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND), TA = -40NC to +105NC, unless otherwise noted. Typical values are at VDVDD = VAVDD = VIOVDD = 1.8V, TA = +25NC) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 9.
PAGE 10
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Typical Operating Characteristics (VAVDD = VDVDD = VIOVDD = 1.8V, DBL = low, TA = +25NC, unless otherwise noted.) SUPPLY CURRENT vs. PCLKIN FREQUENCY (BWS = 1) 60 55 50 45 PREEMPHASIS = 0x01 TO 0x04 40 5 10 15 20 25 30 60 55 50 45 PREEMPHASIS = 0x01 TO 0x04 40 45 5 50 10 15 20 fPCLKIN = 20MHz -10 -20 -40 -50 -60 1% SPREAD 4% SPREAD 2% SPREAD -70 -80 -90 25 30 35 0.
PAGE 11
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive PWDN DRS CONF0 CONF1 OUT- OUT+ AVDD RX/SDA AUTOS TOP VIEW TX/SCL Pin Configuration 30 29 28 27 26 25 24 23 22 21 20 MS PCLKIN 31 DIN0 32 19 GPIO1 DIN1 33 18 GPO DIN2 34 17 DIN21 DVDD 35 16 DIN20 MAX9273 DIN3 36 15 IOVDD 14 DIN19/VS DIN4 37 13 DIN18/VS DIN5 38 IOVDD 39 EP* + 2 3 4 5 6 7 8 9 10 DIN8 DIN9 AVDD DIN10 DIN11 DIN12 DIN13 DIN14/GPIO2 DIN15/GPIO3 11 DIN16/GPIO4 1 DIN7 DIN6 40 12 DIN17/GPIO5
PAGE 12
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Pin Description (continued) PIN NAME FUNCTION 15, 39 IOVDD I/O Supply Voltage. 1.8V to 3.3V logic I/O power supply. Bypass IOVDD to EP with 0.1FF and 0.001FF capacitors as close as possible to the device with the smallest value capacitor closest to IOVDD. 18 GPO General-Purpose Output. GPO follows the GMSL deserializer GPI (or INT) input. GPO = low upon power-up and when PWDN = low.
PAGE 13
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Functional Diagram PCLKIN SSPLL FILTER PLL MAX9273 CLKDIV DIN0–DIN13 OUT+ DIN14/GPIO2 PARALLEL TO SERIAL DIN15/GPIO3 DIN16/GPIO4 OUTCML TX DIN17/GPIO5 SINGLE-/ DOUBLEINPUT LATCH GPO SCRAMBLE/ CRC/ HAMMING/ 8b/10b ENCODE FIFO RX REVERSE CONTROL CHANNEL GPIO1 FCC GPIO DIN18/HS DIN19/VS DIN20, DIN21 UART/I2C TX/SCL Maxim Integrated RX/SDA 13
PAGE 14
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive RL/2 OUT+ VOD VOS OUT- RL/2 GND ((OUT+) + (OUT-))/2 OUTVOS(+) VOS(-) VOS(-) OUT+ DVOS = |VOS(+) - VOS(-)| VOD(+) VOD = 0V VOD(-) VOD(-) DVOD = |VOD(+) - VOD(-)| (OUT+) - (OUT-) Figure 1. Serial-Output Parameters OUT+ VOD(P) VOS VOD(D) OUT+ OR OUT- VO/2 VO VO/2 VO OUT- Figure 3. Single-Ended Output Template SERIAL-BIT TIME PCLKIN Figure 2. Output Waveforms at OUT+, OUTDIN_ NOTE: PCLKIN PROGRAMMED FOR RISING LATCH EDGE.
PAGE 15
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive tT VIH MIN tHIGH PCLKIN VIL MAX tR tF tLOW Figure 5. Parallel Clock Input Requirements PROTOCOL START CONDITION (S) tSU;STA BIT 7 MSB (A7) tLOW BIT 6 (A6) tHIGH BIT 0 (R/W) ACKNOWLEDGE (A) STOP CONDITION (P) 1/fSCL SCL tBUF tr tSP tf SDA tHD;STA tSU;DAT tHD;DAT tVD;DAT tVD;ACK tSU;STO Figure 6. I2C Timing Parameters 800mVP-P t TSOJ1 2 t TSOJ1 2 Figure 7.
PAGE 16
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive VIH MIN PCLKIN VIL MAX tSET tHOLD VIH MIN VIH MIN VIL MAX VIL MAX DIN_ NOTE: PCLKIN PROGRAMMED FOR RISING LATCHING EDGE. Figure 8. Input Setup and Hold Times VIH_MIN DESERIALIZER GPI VIL_MAX tGPIO SERIALIZER GPO tGPIO VOH_MIN VOL_MAX Figure 9.
PAGE 17
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive EXPANDED TIME SCALE DIN_ N N+1 N+3 N+2 N+4 PCLKIN N-1 N OUT+/tSD FIRST BIT LAST BIT Figure 10. Serializer Delay PCLKIN tLOCK 350Fs SERIAL LINK INACTIVE REVERSE CONTROL CHANNEL DISABLED SERIAL LINK ACTIVE CHANNEL DISABLED REVERSE CONTROL CHANNEL AVAILABLE PWDN MUST BE HIGH Figure 11.
PAGE 18
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive PCLKIN PWDN VIH1 tPU POWERED DOWN POWERED UP, SERIAL LINK INACTIVE POWERED UP, SERIAL LINK ACTIVE 350µs REVERSE CONTROL CHANNEL DISABLED REVERSE CONTROL CHANNEL ENABLED REVERSE CONTROL CHANNEL DISABLED REVERSE CONTROL CHANNEL ENABLED Figure 12.
PAGE 19
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 1.
PAGE 20
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 1.
PAGE 21
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 1.
PAGE 22
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive The parallel input has two input modes: single- and double-rate input. In single-input mode, LATCH A stores data from DIN_ every PCLKIN cycle (Figure 13). Parallel data from LATCH A is then sent to the scrambler for serialization (Figure 14). The device accepts pixel clocks from 6.25MHz to 50MHz. In double-input mode, LATCH B stores two input words (Figure 15). Data from LATCH B is sent to the scrambler as a combined word.
PAGE 23
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive PCLKIN ÷2 DIN0–DIN14 OR DIN0–DIN10 FIRST WORD LATCH A SECOND WORD THIRD WORD FIRST WORD LATCH B FOURTH WORD THIRD WORD FIRST AND SECOND WORD THIRD AND FOURTH WORD Figure 16. Double-Input Waveform (Latch on Rising Edge of PCLKIN Selected) Serial Link Signaling and Data Format The serializer uses differential CML signaling to drive twisted-pair cable and single-ended CML to drive coaxial cable. The output amplitude is programmable.
PAGE 24
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive 24 BITS D0 D1 VIDEO AND ERRORCORRECTION DATA 32 BITS D21 FCC PCB D0 D1 FORWARD CONTROLCHANNEL BIT D29 VIDEO AND ERRORCORRECTION DATA FCC PCB FORWARD CONTROLCHANNEL BIT PACKET PARITY CHECK BIT PACKET PARITY CHECK BIT NOTE: SERIAL DATA SHOWN BEFORE SCRAMBLING AND 8b/10b ENCODING Figure 17. Serial-Data Format Table 3.
PAGE 25
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive WRITE DATA FORMAT SYNC DEV ADDR + R/W REG ADDR NUMBER OF BYTES BYTE 1 BYTE N ACK MASTER WRITES TO SLAVE MASTER READS FROM SLAVE READ DATA FORMAT SYNC DEV ADDR + R/W REG ADDR NUMBER OF BYTES MASTER WRITES TO SLAVE ACK BYTE 1 BYTE N MASTER READS FROM SLAVE Figure 18. GMSL UART Protocol for Base Mode 1 UART FRAME START D0 D1 D2 D3 D4 D5 D6 D7 PARITY FRAME 2 FRAME 1 STOP STOP FRAME 3 START STOP START Figure 19.
PAGE 26
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive As shown in Figure 22, the remote-side device converts packets going to or coming from the peripherals from UART format to I2C format and vice versa. The remote device removes the byte number count and adds or receives the ACK between the data bytes of I2C. The I2C bit rate is the same as the UART bit rate.
PAGE 27
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive UART-TO-I2C CONVERSION OF WRITE PACKET (I2CMETHOD = 1) FC 11 SYNC FRAME SERIALIZER/DESERIALIZER 11 11 DEVICE ID + WR REGISTER ADDRESS SERIALIZER/DESERIALIZER FC PERIPHERAL 1 7 S DEV ID 11 NUMBER OF BYTES 11 DATA 0 1 1 W A 8 DATA 0 UART-TO-I2C CONVERSION OF READ PACKET (I2CMETHOD = 1) SERIALIZER/DESERIALIZER 11 11 11 11 SYNC FRAME DEVICE ID + RD REGISTER ADDRESS NUMBER OF BYTES SERIALIZER/DESERIALIZER PERIPHERAL 1 S : MASTER TO SLAVE 1
PAGE 28
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive SDA SCL S P START CONDITION STOP CONDITION Figure 24. START and STOP Conditions SDA SCL DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED Figure 25. Bit Transfer START CONDITION CLOCK PULSE FOR ACKNOWLEDGE 1 SCL 2 8 9 SDA BY TRANSMITTER SDA BY RECEIVER S Figure 26.
PAGE 29
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive because the slave device is the recipient. When the slave device is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. The device generates an acknowledge even when the forward control channel is not active (not locked). To prevent acknowledge generation when the forward control channel is not active, set the I2CLOCACK bit low.
PAGE 30
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive I2C Communication with Remote-Side Devices The serializer supports I2C communication with a peripheral on the remote side of the communication link using SCL clock stretching. While multiple masters can reside on either side of the communication link, arbitration is not provided. The connected masters need to support SCL clock stretching. The remote-side I2C bit-rate range must be set according to the local-side I2C bit rate.
PAGE 31
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Control-Channel Broadcast Mode The serializer supports broadcast commands to control multiple peripheral devices. Select an unused device address to use as a broadcast device address. Program the remote-side GMSL device to translate the broadcast device address (source address stored in registers 0x09, 0x0B) to the peripheral device address (destination address stored in register 0x0A, 0x0C).
PAGE 32
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 6. Serial Output Spread SS SPREAD (%) 000 No spread spectrum. Power-up default. 001 ±0.5% spread spectrum. 010 ±1.5% spread spectrum. 011 ±2% spread spectrum. 100 No spread spectrum. 101 ±1% spread spectrum. 110 ±3% spread spectrum. 111 ±4% spread spectrum. Table 7. Spread Limitations BWS = 0 MODE, PCLKIN FREQUENCY (MHz) BWS = 1 MODE PCLKIN FREQUENCY (MHz) < 33.3 (DBL=0) < 25 (DBL = 0) < 66.
PAGE 33
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 8. Modulation Coefficients and Maximum SDIV Settings BWS 1 0 SPREADSPECTRUM SETTING (%) MODULATION COEFFICIENT (dec) SDIV UPPER LIMIT (dec) 1 104 40 0.5 104 63 3 152 27 1.5 152 54 4 204 15 2 204 30 1 80 52 0.5 80 63 3 112 37 1.
PAGE 34
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive serializer and deserializer have unequal DBL settings and HVEN = 0, then HS/VS inversion should only be used on the side that has DBL = 1. HS/VS encoding sends packets when HSYNC or VSYNC is low, use HS/VS inversion register bits if the input HSYNC and VSYNC signals use an active-low convention to send data packets during the inactive pixel clock periods.
PAGE 35
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Sleep Mode The serializer includes a sleep mode to reduce power consumption. The device enters or exits sleep mode by a command from a local FC or a remote FC using the control channel. Set the SLEEP bit to 1 to initiate sleep mode. The serializer sleeps immediately after setting its SLEEP = 1. The OUT+ and OUT- serial outputs each have wake-up receiver to accept wake-up commands from the attached deserializers.
PAGE 36
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 11. Startup Procedure for Image-Sensing Applications NO. µC SERIALIZER DESERIALIZER — FC connected to deserializer. Sets all configuration inputs. If any inputs are available on one chip but not on the other, always connects input low. 1 Powers up. Powers up and loads default settings. Establishes serial link. Powers up and loads default settings. Locks to serial link signal.
PAGE 37
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Configuration Link Link Startup Procedure acknowledge frame is not generated when communication fails due to contention. If communication across the serial link is not required, the FCs can disable the forward and reverse control channel using the FWDCCEN and REVCCEN bits (0x04, D[1:0]) in the serializer/deserializer. Communication across the serial link is stopped and contention between FCs cannot occur.
PAGE 38
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive serializer follows the transition of LOCK at GPI. If other sources also use the GPI input, the FC can implement a routine to distinguish between interrupts from loss-oflock and normal interrupts. The control channel does not require an active video link and thus can always monitor LOCK. LOCK asserts for a synchronized video link but not for the configuration link.
PAGE 39
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Internal Input Pulldowns The control and configuration inputs (except three-level inputs) include a pulldown resistor to GND. External pulldown resistors are not needed. I2C Choosing I2C/UART Pullup Resistors The and UART open-drain lines require a pullup resistor to provide a logic-high level. There are tradeoffs between power dissipation and speed, and a compromise may be required when choosing pullup resistor values.
PAGE 40
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Board Layout Separate the LVCMOS logic signals and CML/coax highspeed signals to prevent crosstalk. Use a four-layer PCB with separate layers for power, ground, CML/coax, and LVCMOS logic signals. Layout PCB traces close to each other for a 100I differential characteristic impedance. The trace dimensions depend on the type of trace used (microstrip or stripline).
PAGE 41
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) REGISTER ADDRESS 0x00 0x01 BITS NAME VALUE D[7:1] SERID XXXXXXX 0x02 1 Registers 0x00 to 0x1F are read only. D[7:1] DESID XXXXXXX D0 — 0 D4 D[3:2] D[1:0] D[7:6] — PRNG SRNG D[5:0] SDIV Deserializer device address. Reserved. 000 No spread spectrum. 001 ±0.5% spread spectrum. 010 ±1.5% spread spectrum. 011 ±2% spread spectrum. 100 No spread spectrum. 101 ±1% spread spectrum.
PAGE 42
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) (continued) REGISTER ADDRESS BITS D7 0x04 NAME FUNCTION 0 Disable serial link. Power-up default when AUTOS = high. Reverse control-channel communication remains unavailable for 350Fs after the serializer starts/stops the serial link. 1 Enable serial link. Power-up default when AUTOS = low.
PAGE 43
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) (continued) REGISTER ADDRESS BITS D[7:4] NAME CMLLVL 0x06 D[3:0] Maxim Integrated PREEMP VALUE FUNCTION 0000 Do not use. 0001 Do not use. 0010 100mV output level. 0011 150mV output level. 0100 200mV output level. 0101 250mV output level. 0110 300mV output level 0111 350mV output level. 1000 400mV output level. Power-up default when twisted-pair output is selected (Table 9).
PAGE 44
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) (continued) REGISTER ADDRESS BITS NAME D7 DBL D6 DRS D5 BWS D4 D3 — D2 HVEN D7 EDC INVVS 0x08 D6 0x09 0x0A 0x0B Maxim Integrated INVHS FUNCTION 0 Single-input mode. 1 Double-input mode. 0 High data-rate mode. 1 Low data-rate mode. 0 24-bit mode. 1 32-bit mode. 0 Input data latched on rising edge of PCLKIN. Power-up default determined by CONF1 and CONF0 (Table 9).
PAGE 45
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) (continued) REGISTER ADDRESS 0x0C BITS NAME VALUE D[7:1] I2CDSTB XXXXXXX D0 — 0 Reserved. 0 Acknowledge not generated when forward channel is not available. 1 I2C-to-I2C slave generates local acknowledge when forward channel is not available. 00 352ns/117ns I2C setup/hold time. 01 469ns/234ns I2C setup/hold time. 10 938ns/352ns I2C setup/hold time.
PAGE 46
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15.
PAGE 47
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Table 15. Register Table (see Table 1) (continued) REGISTER ADDRESS BITS NAME VALUE 0x12 D[7:0] — 01000000 Reserved. 01000000 0x13 D[7:0] — 00100010 Reserved 00100010 0x14 D[7:0] — XXXXXXXX Reserved. 00000000 (read only) D7 CXTP D6 I2CSEL D5 LCCEN D[4:2] — D1 OUTPUTEN D0 PCLKDET 0x16 D[7:0] — XXXXXXXX Reserved. 00000000 (read only) 0x17 D[7:0] — XXXXXXXX Reserved.
PAGE 48
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Typical Application Circuit PCLKIN PCLK PCLKIN PCLK DOUT0–DOUT21 RGBHV DIN0–DIN21 RGBHV CONF1 CONF0 CX/TP DISPLAY GPU MAX9273 MAX9272 ECU UART TX RX/SDA RX TX/SCL INT GPO MS MS OUT+ IN+ GPI OUT- IN- RX/SDA/EDC TO PERIPHERALS TX/SCL/ES LOCK NOTE: NOT ALL PULLUP/PULLDOWN RESISTORS ARE SHOWN. SEE PIN DESCRIPTION FOR DETAILS.
PAGE 49
MAX9273 22-Bit GMSL Serializer with Coax or STP Cable Drive Revision History REVISION NUMBER REVISION DATE 0 6/12 Initial release — 1 11/12 Added nonautomotive package to Ordering Information. 48 DESCRIPTION PAGES CHANGED Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied.