MAX9860 16-Bit Mono Audio Voice Codec General Description The MAX9860 is a low-power, voiceband, mono audio codec designed to provide a complete audio solution for wireless voice headsets and other mono voice audio devices. Using an on-chip bridge-tied load mono headphone amplifier, the MAX9860 can output 30mW into a 32Ω earpiece while operating from a single 1.8V power supply. Very low power consumption makes it an ideal choice for battery-powered applications.
MAX9860 16-Bit Mono Audio Voice Codec ABSOLUTE MAXIMUM RATINGS (Voltages referenced to AGND.) DVDDIO, SDA, SCL, IRQ.......................................-0.3V to +3.6V AVDD, DVDD............................................................-0.3V to +2V AGND, DGND, MICGND .......................................-0.3V to +0.3V OUTP, OUTN, PREG, REF, MICBIAS .....-0.3V to (VAVDD + 0.3V) MICLP, MICLN, MICRP, MICRN, REG....-0.3V to (VPREG + 0.3V) MCLK, LRCLK, BCLK, SDOUT, SDIN..................................-0.
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, fMCLK = 13MHz, fLRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, fMCLK = 13MHz, fLRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, fMCLK = 13MHz, fLRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, fMCLK = 13MHz, fLRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
MAX9860 16-Bit Mono Audio Voice Codec DIGITAL AUDIO INTERFACE ELECTRICAL CHARACTERISTICS (VDVDD = VDVDDIO = 1.8V, unless otherwise noted.
MAX9860 16-Bit Mono Audio Voice Codec I2C INTERFACE ELECTRICAL CHARACTERISTICS (continued) (VDVDD = VDVDDIO = 1.8V, unless otherwise noted.) (Note 2) PARAMETER SDA Transmitting Fall Time Setup Time for STOP Condition SYMBOL tF CONDITIONS CB is in pF tSU,STO Bus Capacitance CB Pulse Width of Suppressed Spike tSP MIN TYP 20 + 0.1CB MAX UNITS 250 ns 400 pF 50 ns 0.6 µs 0 DIGITAL INPUTS (LRCLK, BCLK, SDIN, MCLK) Input Voltage High VIH Input Voltage Low VIL 0.7 x VDVDDIO V 0.
MAX9860 16-Bit Mono Audio Voice Codec Typical Operating Characteristics (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, fMCLK = 13MHz, TA = +25°C, unless otherwise noted.) RL = 32Ω RL = 16Ω RL = 32Ω 1 1 f = 3.5kHz 0.1 f = 3.5kHz THD+N (%) THD+N (%) 0.1 0.01 0.01 0.01 f = 20kHz 0.001 0.001 5 10 15 POUT = 20mW f = 20kHz 0.001 0 POUT = 5mW 0.
MAX9860 16-Bit Mono Audio Voice Codec Typical Operating Characteristics (continued) (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, fMCLK = 13MHz, TA = +25°C, unless otherwise noted.
MAX9860 16-Bit Mono Audio Voice Codec Typical Operating Characteristics (continued) (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, fMCLK = 13MHz, TA = +25°C, unless otherwise noted.
MAX9860 16-Bit Mono Audio Voice Codec Typical Operating Characteristics (continued) (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, fMCLK = 13MHz, TA = +25°C, unless otherwise noted.
MAX9860 16-Bit Mono Audio Voice Codec Pin Description PIN NAME FUNCTION 1 MICBIAS Microphone Bias. +1.55V microphone bias for internal and/or external microphone. An external resistor from 2.2kΩ to 470Ω should be used to set the microphone current. Bypass to MICGND with a 1µF capacitor. 2 REG 3 PREG 4 REF 5 AGND Analog Ground 6 AVDD Analog Power Supply. Bypass to AGND with 10µF and 0.1µF capacitors.
MAX9860 16-Bit Mono Audio Voice Codec Detailed Description The MAX9860 low-power, voiceband, mono audio codec provides a complete audio solution for wireless voice headsets and other mono audio devices. The mono playback path accepts digital audio over a flexible digital audio interface compatible with I2S, TDM, and left-justified audio signals. An oversampling sigmadelta DAC converts an incoming digital data stream to analog audio and outputs through the mono bridge-tied load headphone amplifier.
MAX9860 16-Bit Mono Audio Voice Codec Table 1.
MAX9860 16-Bit Mono Audio Voice Codec Status/Interrupt Status registers 0x00 and 0x01 are read-only registers that report the status of various device functions. The status register bits are cleared upon a read operation of the status register and are set the next time the event occurs. Register 0x02 determines whether or not the status flags in register 0x00 simultaneously sets IRQ high. Table 2.
MAX9860 16-Bit Mono Audio Voice Codec Clock Control The MAX9860 can work with a master clock (MCLK) supplied from any system clock within the range of 10MHz to 60MHz. Internally, the MAX9860 requires a 10MHz to 20MHz clock so a prescaler divides by 1, 2, or 4 to create the internal clock (PCLK). PCLK is used to clock all portions of the MAX9860. The MAX9860 is capable of supporting any sample rate from 8kHz to 48kHz, including all common sample rates (8kHz, 16kHz, 24kHz, 32kHz, 44.1kHz, 48kHz).
MAX9860 16-Bit Mono Audio Voice Codec Table 3. Clock Control Registers (continued) BITS FUNCTION PLL Enable 0 = (Valid for slave and master mode)—The frequency of LRCLK is set by the NHI and NLO divider bits. Set PLL = 0 in slave mode only if the externally generated LRCLK can be exactly selected using the LRCLK divider. 1 = (Valid for slave mode only)—Used when the audio master generates an LRCLK not selectable using the LRCLK divider.
MAX9860 16-Bit Mono Audio Voice Codec Digital Audio Interface The MAX9860’s digital audio interface supports a wide range of operating modes to ensure maximum compatibility. See Figures 1 through 4 for timing diagrams. In master mode, the MAX9860 outputs LRCLK and BCLK, while in slave mode, they are inputs. When operating in master mode, BCLK can be configured in a number of ways to ensure compatiblity with other audio devices. Table 5.
MAX9860 16-Bit Mono Audio Voice Codec Table 5. Digital Audio Interface Registers (continued) BITS ADLY ST BSEL 20 FUNCTION ADC Delay Mode 0 = SDOUT data is valid on the first BCLK edge following an LRCLK edge. 1 = SDOUT data is delayed one BCLK cycle so that it is valid on the 2nd BCLK edge following an LRCLK edge (I2S-compatible mode). ADLY is ignored when TDM = 1. Stereo Enable 0 = The interface transmits and receives only one channel of data.
MAX9860 16-Bit Mono Audio Voice Codec AUDIO MASTER MODES (ST = 1): LEFT JUSTIFIED : WCI = 0, _BCI = 0, _DLY = 0 7ns (typ) 7ns (typ) LEFT LRCLK RIGHT 1/f S RELATIVE TO PCLK (NOTE 7) D15 SDOUT D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 40ns (max) 0ns (min) 7ns (typ) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 7ns (typ) BCLK 25ns (min) SDIN CONFIGURED BY BSEL 0ns (min) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LE
MAX9860 16-Bit Mono Audio Voice Codec VOICE (TDM) MASTER MODES: _BCI = 0, HIZ = 1, ST = 0 7ns (typ) 7ns (typ) LRCLK 1/fS RELATIVE TO PCLK (NOTE 8) SDOUT L15 L14 L13 L12 L11 L10 L9 L8 L7 40ns (max) 0ns (min) L6 L5 L4 L3 L2 L1 7ns (typ) L0 7ns (typ) BCLK 25ns (min) SDIN CONFIGURED BY BSEL 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 _BCI = 1, HIZ = 1, ST = 0 7ns (typ) 7ns (typ) LRCLK 1/fS RELATIVE TO PCLK (NOTE 8) SDOUT L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 40ns
MAX9860 16-Bit Mono Audio Voice Codec AUDIO SLAVE MODES (ST = 1): LEFT JUSTIFIED: WCI = 0, _BCI = 0, _DLY = 0 LEFT LRCLK RIGHT 1/fS 25ns (min) SDOUT D15 0ns (min) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 40ns (max) 0ns (min) D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 30ns (min) BCLK 25ns (min) 75ns (min) 0ns (min) SDIN 30ns (min) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT JUSTIFIED + LRCLK INVERT: WCI
MAX9860 16-Bit Mono Audio Voice Codec VOICE (TDM) SLAVE MODES: _BCI = 0, HIZ =1, ST = 0 LRCLK 1/fS 25ns (min) SDOUT 0ns (min) 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 40ns (max) 0ns (min) L2 L1 L0 30ns (min) BCLK SDIN 75ns (min) 0ns (min) 25ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 _BCI = 1, HIZ = 1, ST = 0 LRCLK 1/fS 25ns (min) SDOUT 0ns (min) 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 40ns (max) 0ns (min) L3 L2 L1 L0 30ns (min) BCLK 25ns (min)
MAX9860 16-Bit Mono Audio Voice Codec Digital Filtering The MAX9860 incorporates selecable highpass and notch filters for both the playback and record paths. Each filter is valid for a specific sample rate. Table 6. Digital Filter Registers REGISTER ADDRESS 0x08 B7 B6 B5 B4 B3 B2 AVFLT B1 B0 DVFLT BITS FUNCTION AVFLT ADC Voice Filter Frequency Select. See Table 7. DVFLT DAC Voice Filter Frequency Select. See Table 7. Table 7.
MAX9860 16-Bit Mono Audio Voice Codec Digital Level Control The MAX9860 includes digital gain adjustment for the playback and record paths. Independent gain adjustment is provided for the two record channels. Sidetone gain adjustment is also provided to set the sidetone level relative to the playback level. Table 8.
MAX9860 16-Bit Mono Audio Voice Codec Table 8. Digital Level Control Registers (continued) BITS ADCRL/ADCLL DVG DVST Maxim Integrated FUNCTION Left and Right ADC Output Level Adjusts the digital audio level output by the ADCs. CODE GAIN 0x0 +3 0x1 +2 0x2 +1 0x3 0 0x4 -1 0x5 -2 0x6 -3 0x7 -4 0x8 -5 0x9 -6 0xA -7 0xB -8 0xC -8 0xD -10 0xE -11 0xF -12 DAC Gain The gain set by DVG adds to the level set by DVA. CODE GAIN 00 0 01 +6 10 +12 11 +18 Sidetone Sets the level of left ADC output mixed into the DAC.
MAX9860 16-Bit Mono Audio Voice Codec Microphone Inputs The MAX9860 provides two differential microphone inputs and a low-noise 1.55V microphone bias for powering the microphones. In typical applications, the left microphone is used to record a voice signal and the right microphone is used to record a background noise signal. In applications that require only one microphone, use the left microphone input and disable the right ADC. The microphone signals are amplified by two stages of MICBIAS 1.
MAX9860 16-Bit Mono Audio Voice Codec Table 9. Microphone Input Register REGISTER ADDRESS 0x0C BITS PAM PGAM Maxim Integrated B7 0 B6 B5 PAM B4 B3 B2 PGAM B1 B0 FUNCTION Left and Right Microphone Preamp Gain CODE GAIN (dB) 00 Disabled 01 0 10 +20 11 +30 Note: Selecting 00 disables the microphone inputs and microphone bias automatically.
MAX9860 16-Bit Mono Audio Voice Codec Automatic Gain Control (AGC) and Noise Gate The MAX9860 includes AGC on both microphone inputs. AGC is enabled by setting the hold time through AGCHLD. AGC dynamically controls the analog PGA microphone input gain to hold the level constant over a 20dB input range, enhancing the voice path operation for various use conditions.
MAX9860 16-Bit Mono Audio Voice Codec Table 10. AGC and Noise Gate Registers (continued) BITS FUNCTION Noise Gate Threshold The signal level at which the noise gate begins reducing the gain. When the signal level is above the threshold the noise gate has no effect. When the signal level is below the threshold, the noise gate decreases the gain by 1dB for every 2dB the signal is below the threshold. The noise gate can be enabled independently from AGC.
MAX9860 16-Bit Mono Audio Voice Codec Power Management ADCs can be independently enabled so that only the required circuitry is active. The MAX9860 includes complete power management control to minimize power usage. The DAC and both Table 11. Power Management Register REGISTER ADDRESS 0x10 B7 SHDN B6 0 B5 0 B4 0 BITS B3 DACEN B2 0 B1 ADCLEN B0 ADCREN FUNCTION Active-Low Software Shutdown 0 = MAX9860 is in full shutdown. 1 = MAX9860 is powered on. SHDN DACEN ADCLEN/ADCREN When SHDN = 0.
MAX9860 16-Bit Mono Audio Voice Codec SDA tSU,STA tSU,DAT tLOW tBUF tHD,STA tHD,DAT tSP tSU,STO tHIGH SCL tHD,STA tR START CONDITION tF REPEATED START CONDITION STOP CONDITION START CONDITION Figure 6. 2-Wire Interface Timing Diagram Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section).
MAX9860 16-Bit Mono Audio Voice Codec S Sr P SCL SDA Figure 7. START (S), STOP (P), and REPEATED START (Sr) Conditions CLOCK PULSE FOR ACKNOWLEDGMENT START CONDITION SCL 1 28 9 NOT ACKNOWLEDGE SDA ACKNOWLEDGE Figure 8. Acknowledge ACKNOWLEDGE FROM MAX9860 B7 ACKNOWLEDGE FROM MAX9860 S SLAVE ADDRESS 0 B6 B5 B4 B3 B2 B1 B0 ACKNOWLEDGE FROM MAX9860 A REGISTER ADDRESS R/W A DATA BYTE A P 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Figure 9.
MAX9860 16-Bit Mono Audio Voice Codec ACKNOWLEDGE FROM MAX9860 ACKNOWLEDGE FROM MAX9860 S B7 B6 B5 B4 B3 B2 B1 B0 ACKNOWLEDGE FROM MAX9860 SLAVE ADDRESS 0 A ACKNOWLEDGE FROM MAX9860 A REGISTER ADDRESS A DATA BYTE 1 R/W B7 B6 B5 B4 B3 B2 B1 B0 DATA BYTE n 1 BYTE A P 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Figure 10.
MAX9860 16-Bit Mono Audio Voice Codec MICBIAS MICLP MICLN MICRP MICRN IRQ TOP VIEW MICGND Pin Configuration 24 23 22 21 20 19 1 18 BCLK + REG 2 17 LRCLK PREG 3 16 SDIN REF 4 15 SDOUT AGND 5 14 MCLK AVDD 6 13 DVDD MAX9860 10 11 12 DVDDIO DGND OUTN 9 SCL 8 SDA 7 OUTP *EP Route microphone signals from the microphone to the MAX9860 as a differential pair, ensuring that the positive and negative signals follow the same path as closely as possible with equal tra
MAX9860 16-Bit Mono Audio Voice Codec Functional Diagram/Typical Operating Circuit 1.7V TO 3.6V 1.7V TO 1.9V 1.7V TO 1.9V 1µF 1µF 13 DVDD 11 DVDDIO 10µF 0.1µF 6 AVDD DIGITAL ANALOG 0, +6dB, +12dB, +24dB SDOUT 15 MONO SDIN 16 DIGITAL AUDIO INTERFACE LRCLK 17 DVG Σ P DVST MAX9860 P LEFT ADC ADCLL/ ADCRL TIMING AND CONTROL LOGIC LOW-LEVEL AUDIO QUIETING CONTROL P 1.
MAX9860 16-Bit Mono Audio Voice Codec Revision History REVISION NUMBER REVISION DATE 0 10/08 DESCRIPTION PAGES CHANGED Initial release — 1 9/09 Corrected error in Table 11 32 2 2/12 Removed VOS typical spec and updated max spec 5 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied.