Datasheet

MAXQ610
16-Bit Microcontroller with Infrared Module
18 ______________________________________________________________________________________
When RXBCNT = 1, the IRV capture operation is dis-
abled and the interrupt flag associated with the capture
no longer denotes a capture. In the carrier burst-count
mode, the IRMT register is now used only to count quali-
fied edges. The IRIF interrupt flag (normally used to sig-
nal a capture when RXBCNT = 0) now becomes set if
ever two IRCA cycles elapse without getting a qualified
edge. The IRIF interrupt flag thus denotes absence of
the carrier and the beginning of a space in the receive
signal. When the RXBCNT bit is changed from 0 to 1,
the IRMT register is set to 0001h. The IRCFME bit is still
used to define whether the IRV register is counting sys-
tem IRCLK clocks or IRCA-defined carrier cycles. The
IRXRL bit is still used to define whether the IRV register
is reloaded with 0000h on detection of a qualified edge
(per the IRXSEL[1:0] bits). Figure 6 and the descriptive
sequence embedded in the figure illustrate the expect-
ed usage of the receive burst-count mode.
16-Bit Timers/Counters
The MAXQ610 provides two timers/counters that sup-
port the following functions:
• 16-bit timer/counter
• 16-bit up/down autoreload
• Counter function of external pulse
• 16-bit timer with capture
• 16-bit timer with compare
• Input/output enhancements for pulse-width modulation
• Set/reset/toggle output state on comparator match
• Prescaler with 2
n
divider (for n = 0, 2, 4, 6, 8, 10)
General-Purpose I/O
The MAXQ610 provides port pins for general-purpose
I/Os that have the following features:
• CMOS output drivers
• Schmitt trigger inputs
• Optional weak pullup to V
DD
when operating in input
mode
While the microcontroller is in a reset state, all port pins
become high impedance with weak pullups disabled,
unless otherwise noted.
From a software perspective, each port appears as a
group of peripheral registers with unique addresses.
Special function pins can also be used as general-pur-
pose I/O pins when the special functions are disabled.
For a detailed description of the special functions avail-
able for each pin, refer to the part-specific user manual.
The
MAXQ610 User’s Guide describes all special func-
tions available on the MAXQ610.
USART
The USART units are implemented with the following
characteristics:
• 2-wire interface
• Full-duplex operation for asynchronous data transfers
• Half-duplex operation for synchronous data transfers
• Programmable interrupt for receive and transmit
• Independent baud-rate generator
• Programmable 9th bit parity support
• Start/stop bit support
Serial Peripheral Interface (SPI)
The integrated SPI provides an independent serial
communication channel that communicates synchro-
nously with peripheral devices in a multiple master or
multiple slave system. The interface allows access to a
4-wire, full-duplex serial bus, and can be operated in
either master mode or slave mode. Collision detection
is provided when two or more masters attempt a data
transfer at the same time.
The maximum SPI master transfer rate is Sysclk/2.
When operating as an SPI slave, the MAXQ610 can
support up to a Sysclk/4 SPI transfer rate. Data is trans-
ferred as an 8-bit or 16-bit value, MSB first. In addition,
the SPI module supports configuration of active SSEL
state through the slave active select.
MODE TYPE START BITS DATA BITS STOP BITS
Mode 0 Synchronous N/A 8 N/A
Mode 1 Asynchronous 1 8 1
Mode 2 Asynchronous 1 8 + 1 1
Mode 3 Asynchronous 1 8 + 1 1
Table 3. USART Mode Details