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Maxim > Design Support > Technical Documents > Subsystem Boards > APP 5563

Keywords: Fresno, MAXREFDES11, subsystem reference design, analog front end, AFE, industrial sensors,

isolated power and data, industrial automation, PLC, medical

SUBSYSTEM BOARD 5563

Fresno (MAXREFDES11#): 16-Bit High-Accuracy 0 to

10V Input Isolated Analog Front End (AFE)

Jan 19, 2013

Abstract: This document explains how the Fresno (MAXREFDES11#) subsystem reference design meets the

higher resolution and higher voltage needs of industrial control and industrial automation applications. Hardware

and firmware design files as well as FFTs and histograms from lab measurements are provided.

Introduction

Low resolution and low input voltage

analog-to-digital converters (ADCs) are

integrated in many of today's field

programmable gate arrays (FPGAs) and

microcontrollers. However, they fall short

on meeting the needs of industrial control

and industrial automation applications that

require higher resolutions and higher input

voltages. The Fresno (MAXREFDES11#) subsystem reference design is a 16-bit high-accuracy industrial

analog front end (AFE) that accepts 0 to 10V signals and features isolated power and data—all integrated into a

small form factor. The Fresno design integrates an ultra-precision low-noise buffer (MAX44250); a highly

accurate ADC (MAX11100); an ultra-high-precision 4.096V voltage reference (MAX6126); 600V

RMS

data

isolation (MAX14850); and isolated/regulated +5.5V, +5V, and -3V power rails (MAX256/MAX1659/MAX1735).

This AFE solution can be used in any application that needs high-accuracy analog-to-digital conversion, but it is

mainly targeted for industrial sensors, industrial automation, process control, programmable logic controllers

(PLCs), and medical applications.

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Summary of content (11 pages)

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Maxim > Design Support > Technical Documents > Subsystem Boards > APP 5563 Keywords: Fresno, MAXREFDES11, subsystem reference design, analog front end, AFE, industrial sensors, isolated power and data, industrial automation, PLC, medical SUBSYSTEM BOARD 5563 Fresno (MAXREFDES11#): 16-Bit High-Accuracy 0 to 10V Input Isolated Analog Front End (AFE) Jan 19, 2013 Abstract: This document explains how the Fresno (MAXREFDES11#) subsystem reference design meets the higher resolution and higher voltage needs of i
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Figure 1. The Fresno subsystem design block diagram. Features High accuracy 0 to 10V input range Isolated power and data Small printed circuit board (PCB) area Device drivers Example C source code Applications Industrial sensors Process control Industrial automation PLC Medical Pmod™-compatible form factor Detailed Description of Hardware The Pmod specification allows for both 3.3V and 5V modules as well as various pin assignments. This module is designed only for a supply voltage of 3.
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Table 1. Power Options for the Fresno Subsystem Reference Design Power Type Jumper Shunt Input Voltage (V) Input Current (mA, typ) On-board isolated power JU1: 1–2 JU2: 2–3 JU3: 1–2 3.3 71 JU1: 2–3 JU2: 1–2 JU3: 2–3 6 10 External power -5 2 Table 2.
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soft core microcontroller placed inside a Xilinx ® Spartan-6 FPGA. Support for additional platforms may be added periodically under Firmware Files in the All Design Files section. The currently supported platforms and ports are shown in Table 2. The firmware is a working example of how to interface to the hardware, collect samples, and save them to memory. The simple process flow is shown in Figure 2.
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which is based on the Eclipse open source standard. Custom Fresno-specific design functions were created utilizing the AXI MAX11100 custom IP core. The SPI clock frequency is set to 4.54MHz when a 189.4ksps sampling rate is selected. The SPI clock frequency is set to 2.5MHz for all other sampling rates. Figure 3. The Fresno firmware flowchart for ZedBoard platform.
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Fresno (MAXREFDES11#) ZedBoard Quick Start Guide Lab Measurements Equipment used: Audio Precision ® SYS-2722 signal source or equivalent Voltage calibrator DVC-8500 Windows PC with two USB ports Fresno (MAXREFDES11#) board Nexys 3 development kit +10V power supply -5V power supply Special care must be taken and the proper equipment must be used when testing the Fresno design.
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Figure 4. AC FFT using on-board isolated power, a 0 to 10V 1kHz sine wave input signal, high-impedance input, a 20ksps sample rate, and a Blackman-Harris window.
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Figure 5. DC histogram using on-board isolated power; a 5V input signal; a 20ksps sample rate; 65,536 samples; a code spread of 8 LSBs with 96.3% of the codes falling within the three center LSBs; and a standard deviation of 0.785.
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Figure 6. AC FFT using external power, a 0 to 10V 1kHz sine wave input signal, a 20ksps sample rate, and a Blackman-Harris window.
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Figure 7. DC histogram using external power; a 5V input signal; a 20ksps sample rate; 65,536 samples; a code spread of 7 LSBs with 98.5% of the codes falling within the three center LSBs; and a standard deviation of 0.651. All Design Files Download all design files. Hardware Files Schematic Bill of materials (BOM) PCB layout PCB Gerber PCB CAD (PADS 9.
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ARM is a registered trademark and registered service mark of ARM Limited. Audio Precision is a registered trademark of Audio Precision, Inc. AutoShutdown is a trademark of Maxim Integrated Products, Inc. Cortex is a registered trademark of ARM Limited. Eclipse is a trademark of Eclipse Foundation, Inc. Halo is a registered trademark of Halo Electronics, Inc. MicroBlaze is a trademark of Xilinx, Inc. Nexys is a trademark of Digilent Inc. Pmod is a trademark of Digilent Inc.