Datasheet

soft core microcontroller placed inside a Xilinx
®
Spartan-6 FPGA. Support for additional platforms may be
added periodically under Firmware Files in the All Design Files section. The currently supported platforms and
ports are shown in Table 2.
The firmware is a working example of how to interface to the hardware, collect samples, and save them to
memory. The simple process flow is shown in Figure 2. The firmware is written in C using the Xilinx SDK tool,
which is based on the Eclipse
™
open source standard. Custom Fresno-specific design functions were created
utilizing the standard Xilinx XSpi core version 3.03a. The SPI clock frequency is set to 3.125MHz.
Figure 2. The Fresno firmware flowchart for Nexys 3 platform.
The firmware accepts commands, writes status, and is capable of downloading blocks of sampled data to a
standard terminal program via a virtual COM port. The complete source code is provided to speed up customer
development. Code documentation can be found in the corresponding firmware platform files.
Detailed Description of Firmware for ZedBoard Platform
The Fresno firmware design is also developed and tested for the ZedBoard kit and targets an ARM
®
Cortex
®
-
A9 processor placed inside a Xilinx Zynq system-on-chip (SoC). An AXI MAX11100 custom IP core is created
for this reference design to optimize the sampling rate and the SPI timing stability.
The firmware is a working example of how to interface to the hardware, collect samples, and save them to
memory. The simple process flow is shown in Figure 3. The firmware is written in C using the Xilinx SDK tool,
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