Datasheet

require the MAX9632 amplifiers to provide a high input impedance or when power isolation is required. If the
MAX9632 amplifiers are not needed, then a single +6V isolated supply can power the entire circuit. Data isolation
is also optional depending on the application and is accomplished using the MAX14850 (U9) digital data isolator.
The combined power and data isolation achieved is 600V
RMS
.
Detailed Description of Firmware for Nexys 3 Platform
The Santa Fe firmware design was initially released for the Nexys 3 development kit and targeted a MicroBlaze
™
soft core microcontroller placed inside a Xilinx
®
Spartan-6 FPGA. Support for additional platforms may be added
periodically under Firmware Files in the All Design Files section. The currently supported platforms and ports are
shown in Table 2.
The firmware is a working example of how to interface to the hardware, collect samples, and save them to
memory. The simple process flow is shown in Figure 2a. The firmware is written in C using the Xilinx SDK tool,
which is based on the Eclipse
™
open source standard. Custom Santa Fe-specific design functions were created
utilizing the standard Xilinx XSpi core version 3.03a. The SPI clock frequency is set to 3.125MHz.
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