Datasheet

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_______________General Description

Maxim’s MX7575/MX7576 are high-speed (5µs/10µs),

microprocessor (µP) compatible, 8-bit analog-to-digital

converters (ADCs). The MX7575 provides an on-chip

track/hold function that allows full-scale signals up to

50kHz (386mV/µs slew rate) to be acquired and digi-

tized accurately. Both ADCs use a successive-approxi-

mation technique to achieve their fast conversions and

low power dissipation. The MX7575/MX7576 operate

with a +5V supply and a 1.23V external reference. They

accept input voltages ranging from 0V to 2V

REF

The MX7575/MX7576 are easily interfaced to all popu-

lar 8-bit µPs through standard CS and RD control sig-

nals. These signals control conversion start and data

access. A BUSY signal indicates the beginning and

end of a conversion. Since all the data outputs are

latched and three-state buffered, the MX7575/MX7576

can be directly tied to a µP data bus or system l/O port.

Maxim also makes the MAX165, a plug-in replacement

for the MX7575 with an internal 1.23V reference. For

applications that require a differential analog input and

an internal reference, the MAX166 is recommended.

________________________Applications

Digital Signal Processing

High-Speed Data Acquisition

Telecommunications

Audio Systems

High-Speed Servo Loops

Low-Power Data Loggers

____________________________Features

♦ Fast Conversion Time: 5µs (MX7575)

10µs (MX7576)

♦ Built-In Track/Hold Function (MX7575)

♦ Low Total Unadjusted Error (±1LSB max)

♦ 50kHz Full-Power Signal Bandwidth (MX7575)

♦ Single +5V Supply Operation

♦ 8-Bit µP Interface

♦ 100ns Data-Access Time

♦ Low Power: 15mW

♦ Small-Footprint Packages

MX7575/MX7576

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

________________________________________________________________

Maxim Integrated Products

DAC

COMP

LATCH AND

THREE-STATE

OUTPUT DRIVERS

SAR

TRACK/

HOLD

CLOCK

OSCILLATOR

CONTROL

LOGIC

AIN

AGND

REF

CLK

BUSY DGND

.

MX7575

Functional Diagrams continued at end of data sheet.

_______________Functional Diagrams



REF

AIN

AGND

D0 (LSB)

D1

D2

D3

CS

RD

TP (MODE)

BUSY

CLK

D7 (MSB)

D6

D5

DGND



TOP VIEW

DIP/SO

MX7575

MX7576

( ) ARE FOR MX7576 ONLY.



Pin Configurations continued at end of data sheet.

_________________Pin Configurations

19-0876; Rev 1; 5/96

PART

MX7575JN

MX7575KN

MX7575JCWN 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

18 Plastic DIP

18 Wide SO

______________Ordering Information

Ordering Information continued at end of data sheet.

* Contact factory for dice specifications.

** Contact factory for availability.

MX7575KCWN 0°C to +70°C 18 Wide SO

MX7575JP 0°C to +70°C 20 PLCC

MX7575KP 0°C to +70°C 20 PLCC

INL

(LSB)

±1

±1/2

±1

±1/2

±1

±1/2

MX7575J/D 0°C to +70°C Dice* ±1

MX7575AQ -25°C to +85°C 18 CERDIP**

MX7575BQ -25°C to +85°C 18 CERDIP**

±1

±1/2

Summary of content (12 pages)

PAGE 1
9-0876; Rev 1; 5/96 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs ________________________Applications Digital Signal Processing High-Speed Data Acquisition Telecommunications Audio Systems High-Speed Servo Loops Low-Power Data Loggers _________________Pin Configurations ____________________________Features ♦ Fast Conversion Time: 5µs (MX7575) 10µs (MX7576) ♦ Built-In Track/Hold Function (MX7575) ♦ Low Total Unadjusted Error (±1LSB max) ♦ 50kHz Full-Power Signal Bandwidth (MX7575) ♦ Single +5V Supply Ope
PAGE 2
MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs ABSOLUTE MAXIMUM RATINGS VDD to AGND...............................................................-0.3V, +7V VDD to DGND ..............................................................-0.3V, +7V AGND to DGND ...............................................-0.3V, VDD + 0.3V Digital Input Voltage to DGND (CS, RD, TP, MODE) ......................................-0.3V, VDD + 0.3V Digital Output Voltage to DGND (BUSY, D0–D7) ................................
PAGE 3
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs (V DD = +5V; V REF = 1.23V; AGND = DGND = 0V; f CLK = 4MHz external for MX7575; f CLK = 2MHz external for MX7576; TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.8 V CLOCK Input Low Voltage VINL Input High Voltage VINH 2.4 Input Low Current IINL VIN = 0V Input High Current IINH VIN = VDD Output Low Voltage VOL ISINK = 1.
PAGE 4
MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs TIMING CHARACTERISTICS (Note 5) (VDD = +5V, VREF = 1.23V, AGND = DGND = 0V.
PAGE 5
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs +5V 3k D_ D_ 3k D_ 100pF 100pF DGND DGND a) HIGH-Z TO VOH 3k b) HIGH-Z TO VOL NOTE: D_ REPRESENTS ANY OF THE DATA OUTPUTS D_ 3k 10pF DGND a) VOH TO HIGH-Z 10pF DGND b) VOL TO HIGH-Z NOTE: D_ REPRESENTS ANY OF THE DATA OUTPUTS Figure 1. Load Circuits for Data-Access Time Test Figure 2. Load Circuits for Data-Hold Time Test _______________Detailed Description are performed.
PAGE 6
MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs CS CS t5 t1 RD t1 t5 RD t2 t8 t2 tCONV BUSY t4 BUSY t3 DATA HIGHIMPEDANCE BUS t6 t7 NEW DATA OLD DATA HIGHIMPEDANCE BUS Figure 3. Slow-Memory Interface Timing Diagram A8–A15 ADDRESS BUS TP/MODE ADDRESS DECODE S0 ALE AD0–AD7 ADDRESS LATCH CS MX7575* RD MX7576 BUSY t3 t7 OLD DATA t7 NEW DATA HIGH-IMPEDANCE BUS HIGHIMPEDANCE BUS Figure 5.
PAGE 7
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs +5V DEFER UPDATING TP/MODE MREQ CS ADDRESS EN DECODE CS MX7575* MX7576 RD RD D7 D0 DB7 DB0 t1 t5 t4 RD BUSY t3 HIGHDATA IMPEDANCE BUS DATA BUS t7 VALID DATA VALID DATA HIGH-IMPEDANCE BUS HIGHIMPEDANCE BUS * SOME CIRCUITRY OMITTED FOR CLARITY Figure 7.
PAGE 8
MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs MX7575 Track/Hold MX7576 Analog Input The track/hold consists of a sampling capacitor and a switch to capture the input signal. The simplified diagram of this block is shown in Figure 11. At the beginning of the conversion, switch S1 is closed, and the input signal is tracked. The input signal is held (switch S1 opens) on the third falling edge of clock after CS and RD go low (Figure 12).
PAGE 9
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs The decoupling capacitors are necessary to provide a low AC source impedance. MX7575/6 FIG13 TA = +25°C 42 Internal/External Clock The MX7575/MX7576 can be run with either an externally applied clock or their internal clock. In either case, the signal appearing at the clock pin is internally divided by two to provide an internal clock signal that is relatively insensitive to the input clock duty cycle.
PAGE 10
MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs OUTPUT CODE +5V 47µF 0.1µF +5V +5V 3.3k 2.46V(max) +1.23V + - 47µF 16 RCLK 100k, 2% 18 VDD CLK AIN BUSY 17 0.1µF 15 CS REF AGND 1111 1111 1111 1110 1111 1101 5 4 1 2 RD TP/ 3 MODE MX7575 MX7576 CCLK 100pF, 1% CONTROL INPUTS D7–D0 DATA OUT 0000 0011 0000 0010 0000 0001 0000 0000 FS - 1LSB 1LSB 3LSBs 2LSBs AIN, INPUT VOLTAGE (IN TERMS OF LSBs) Figure 16b.
PAGE 11
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs +5V 47µF 0.1µF 47µF + OUTPUT CODE 0.1µF +5V R6 3.3k 18 VDD 5 17 CLK REF +5V TLC271 RCLK 111...111 111...110 CL 100pF 2% 100...010 MX7575 ICL8069 1.2V REFERENCE 100...001 R5 5k R4 8.2k R7 10k MX7575/MX7576 +5V R1 1k 16 100...000 -FS 2 -1/2LSB 011...111 AIN D7–D0 AGND DGND DATA OUT R2 9 15 820Ω 1/2LSB FS -1LSB 2 AIN 011...110 R3 500Ω 000...001 FS = 2VREF 000...000 1LSB = 2FS 256 INPUT VOLTAGE Figure 18a.
PAGE 12
____Pin Configurations (continued) _Ordering Information (continued) PART RD CS N.C. VDD REF TOP VIEW 3 2 1 20 19 TP (MODE) 4 BUSY 5 CLK 6 D7 (MSB) 7 15 D1 D6 8 14 9 10 11 12 13 D5 N.C. D4 D3 MX7575 MX7576 DGND MX7575/MX7576 CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs 18 AIN 17 AGND 16 D0 (LSB) TEMP.