Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Rev 1; 2/14 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2014 Maxim Integrated Products, Inc.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Table of Contents 1. Required Equipment ................................................................................................. 3 2. Overview ................................................................................................................... 3 3. Included Files ........................................................................................................... 5 4. Procedure ...........................................
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 1. Required Equipment • • • • • PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and two USB ports (Refer to Xilinx AR# 51895 if you installed ISE WebPACKTM design software on your PC.) License for Xilinx EDK/SDK version 14.2 or later (free WebPACK license is OK) Santa Fe (MAXREFDES5#) board ZedBoardTM development kit Industrial sensor or signal source 2.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Figure 1. Santa Fe Board Connected to ZedBoard Development Kit Figure 2.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 3. Included Files The top level of the hardware design is a Xilinx PlanAhead Project (.prr) for Xilinx PlanAhead version 14.2. The Verilog-based arm_system_stub.v module provides FPGA/board net connectivity and instantiates both the Zynq® Processing System as well as the Zynq SPI peripheral that interfaces directly to the Pmod port.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 4. Procedure 1. Connect the Santa Fe board to the JA1 port of a ZedBoard as shown in Figure 1. 2. Power up the ZedBoard by connecting its corresponding AC-to-DC power adaptor and sliding the SW8 switch on the ZedBoard to the ON position. 3. Download the latest “all design files” RD5V02_00.ZIP file at www.maximintegrated.com/AN5561. All files available for download are available at the bottom of the page. 4. Extract the RD5V02_00.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 5. Open the Xilinx Software Development Kit (SDK) from the Windows Start menu. 6. SDK will prompt for a workspace directory, which is the location where the software project is located. For this example, it is: C:\designs\maxim\RD5V02_00\RD5_ZED_V01_00\Design_Files\top.sdk\SDK\SDK_Export Click OK and SDK will open. The Xilinx SDK is based on an Eclipse™-based IDE, so it will be a familiar flow for many software developers.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 7. Review the SDK IDE. The Project Explorer in the upper left tab should have three components as shown in the image below. If all three subfolders are present, you can skip the next step.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 8. If the Project Explorer does not contain these three subfolders, launch the File | Import menu, expand the General folder, and select Existing Projects into Workspace. Click Next. Set the root directory to: C:\designs\maxim\RD5V02_00\RD5_ZED_V01_00\Design_Files\top.sdk\SDK\SDK_Export and the missing projects should appear in SDK Project Explorer with their checkboxes checked. Click Finish to import the projects.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 9. To download the bitstream (.BIT) file to the board, click on the Program FPGA icon (which looks like a green chain of devices). The Program FPGA dialog box appears. From here, an FPGA bitstream (.BIT) file is selected. Be sure to select the .BIT file by using the path below. Bitstream: C:\designs\maxim\RD5V01_00\RD5_ZED_V01_00\Design_Files\top.sdk\SDK \SDK_Export\arm_system_hw_platform\system.bit Press Program.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 10. Set up the terminal program to run on the PC using the following steps. Before loading the executable firmware file on the FPGA, the terminal program on the PC should be running. The example firmware running on the FPGA communicates with the PC via a USB port set up to emulate a serial port (UART). To establish this communication link, the PC must be configured with the appropriate Windows drivers.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 11. Use the Xilinx SDK to download and run the executable ELF (.ELF) file on the ARM Cortex-A9 processor using the following steps. Right-click the mouse while the MAXREFDES5 C project is selected, choose the Run As menu, and then Run Configurations… menu as shown below.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Next, double-click the mouse on the Xilinx C/C++ ELF menu.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Next, press the Search Project button.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Double-click on the MAXREFDES5.elf binary.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide Verify the application is selected on the Main tab.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide On the Device Initialization tab, click Browse… button to select the “ps7_init.tcl” initialization TCL file and press the Run button. Once the Debug/MAXREFDES5 configuration is set up once, you just need to press the Run button if you ever want to run the program again.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide At this point, the application will be running on the Cortex-A9 and the terminal program will show the menu below. Make the desired selections by pressing the appropriate keys on the keyboard. For example, to select channel AIN0, press 0.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 5. Code Documentation Code documentation can be found at: C:\...\RD5V01_00\RD5_ZED_V01_00\Code_Documentation\ To view the code documentation in HTML format with a browser, open the MainPage.html file. To view the code documentation in .PDF format with a PDF reader, open the MAXREFDES5_Code_Documentation.pdf file.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 6. Appendix A: Project Structure and Key Filenames 7. Trademarks ARM is a registered trademark of ARM Ltd. Cortex is a trademark of ARM Ltd. Eclipse is a trademark of Eclipse Foundation, Inc. MicroBlaze is a trademark of Xilinx, Inc. Pmod is a trademark of Digilent, Inc. WebPACK is a trademark of Xilinx, Inc. Windows is a registered trademark and registered service mark and Windows XP is a registered trademark of Microsoft Corporation.
Santa Fe (MAXREFDES5#) ZedBoard Quick Start Guide 8.
